pan/bi: Fix DISCARD ops in disasm

[mesa.git] / src / panfrost / bifrost / disassemble.c

diff --git a/src/panfrost/bifrost/disassemble.c b/src/panfrost/bifrost/disassemble.c
index 48d6e700e3daa9ec3a00b7991b2bbb3730ef3c1e..38fcb8adc85f32122fbd0d231c26ea34c0aab629 100644 (file)
--- a/src/panfrost/bifrost/disassemble.c
+++ b/src/panfrost/bifrost/disassemble.c
@@ -1070,6 +1070,7 @@ static const struct add_op_info add_op_infos[] = {
         { 0x0ea78, "SEL.YY.i16", ADD_TWO_SRC },
         { 0x0ec00, "F32_TO_F16", ADD_TWO_SRC },
         { 0x0e840, "CSEL.64",    ADD_THREE_SRC }, // u2u32(src2) ? src0 : src1
+        { 0x0e940, "CSEL.8",    ADD_THREE_SRC }, // (src2 != 0) ? src0 : src1
         { 0x0f640, "ICMP.GL.GT", ADD_TWO_SRC }, // src0 > src1 ? 1 : 0
         { 0x0f648, "ICMP.GL.GE", ADD_TWO_SRC },
         { 0x0f650, "UCMP.GL.GT", ADD_TWO_SRC },
@@ -1084,10 +1085,18 @@ static const struct add_op_info add_op_infos[] = {
         { 0x0f6d0, "UCMP.D3D.GT", ADD_TWO_SRC },
         { 0x0f6d8, "UCMP.D3D.GE", ADD_TWO_SRC },
         { 0x0f6e0, "ICMP.D3D.EQ", ADD_TWO_SRC },
+        { 0x0f700, "ICMP.64.GT.PT1", ADD_TWO_SRC },
+        { 0x0f708, "ICMP.64.GE.PT1", ADD_TWO_SRC },
+        { 0x0f710, "UCMP.64.GT.PT1", ADD_TWO_SRC },
+        { 0x0f718, "UCMP.64.GE.PT1", ADD_TWO_SRC },
+        { 0x0f720, "ICMP.64.EQ.PT1", ADD_TWO_SRC },
+        { 0x0f728, "ICMP.64.NE.PT1", ADD_TWO_SRC },
+        { 0x0f7c0, "ICMP.64.PT2", ADD_THREE_SRC }, // src3 = result of PT1
         { 0x10000, "MAX.v2f16", ADD_FMINMAX16 },
         { 0x11000, "ADD_MSCALE.f32", ADD_FADDMscale },
         { 0x12000, "MIN.v2f16", ADD_FMINMAX16 },
         { 0x14000, "ADD.v2f16", ADD_FADD16 },
+        { 0x16000, "FCMP.GL", ADD_FCMP16 },
         { 0x17000, "FCMP.D3D", ADD_FCMP16 },
         { 0x17880, "ADD.v4i8", ADD_TWO_SRC },
         { 0x178c0, "ADD.i32",  ADD_TWO_SRC },
@@ -1098,12 +1107,15 @@ static const struct add_op_info add_op_infos[] = {
         { 0x17d90, "ADD.i32.u16.X", ADD_TWO_SRC },
         { 0x17dc0, "ADD.i32.i16.Y", ADD_TWO_SRC },
         { 0x17dd0, "ADD.i32.u16.Y", ADD_TWO_SRC },
-        { 0x18000, "LD_VAR_ADDR", ADD_VARYING_ADDRESS, true },
-        { 0x19181, "DISCARD.FEQ.f32", ADD_TWO_SRC, true },
-        { 0x19189, "DISCARD.FNE.f32", ADD_TWO_SRC, true },
-        { 0x1918C, "DISCARD.GL.f32", ADD_TWO_SRC, true }, /* Consumes ICMP.GL/etc with fixed 0 argument */
-        { 0x19190, "DISCARD.FLE.f32", ADD_TWO_SRC, true },
-        { 0x19198, "DISCARD.FLT.f32", ADD_TWO_SRC, true },
+        { 0x18000, "LD_VAR_ADDR", ADD_VARYING_ADDRESS, false },
+        { 0x19100, "DISCARD.FEQ.f16", ADD_TWO_SRC, false },
+        { 0x19188, "DISCARD.FNE.f16", ADD_TWO_SRC, false },
+        { 0x19110, "DISCARD.FLE.f16", ADD_TWO_SRC, false },
+        { 0x19118, "DISCARD.FLT.f16", ADD_TWO_SRC, false },
+        { 0x19180, "DISCARD.FEQ.f32", ADD_TWO_SRC, false },
+        { 0x19188, "DISCARD.FNE.f32", ADD_TWO_SRC, false },
+        { 0x19190, "DISCARD.FLE.f32", ADD_TWO_SRC, false },
+        { 0x19198, "DISCARD.FLT.f32", ADD_TWO_SRC, false },
         { 0x191e8, "ATEST.f32", ADD_TWO_SRC, true },
         { 0x191f0, "ATEST.X.f16", ADD_TWO_SRC, true },
         { 0x191f8, "ATEST.Y.f16", ADD_TWO_SRC, true },