/* If the op supports it */
enum midgard_roundmode roundmode;
- /* Special fields for an ALU instruction */
- midgard_reg_info registers;
-
/* For textures: should helpers execute this instruction (instead of
* just helping with derivatives)? Should helpers terminate after? */
bool helper_terminate;
unsigned nr_dependencies;
BITSET_WORD *dependents;
+ /* Use this in conjunction with `type` */
+ unsigned op;
+
+ /* This refers to midgard_outmod_float or midgard_outmod_int.
+ * In case of a ALU op, use midgard_is_integer_out_op() to know which
+ * one is used.
+ * If it's a texture op, it's always midgard_outmod_float. */
+ unsigned outmod;
+
union {
midgard_load_store_word load_store;
- midgard_vector_alu alu;
midgard_texture_word texture;
- midgard_branch_extended branch_extended;
- uint16_t br_compact;
- /* General branch, rather than packed br_compact. Higher level
- * than the other components */
midgard_branch branch;
};
} midgard_instruction;
} midgard_bundle;
enum midgard_rt_id {
- MIDGARD_COLOR_RT0,
+ MIDGARD_COLOR_RT0 = 0,
MIDGARD_COLOR_RT1,
MIDGARD_COLOR_RT2,
MIDGARD_COLOR_RT3,
+ MIDGARD_COLOR_RT4,
+ MIDGARD_COLOR_RT5,
+ MIDGARD_COLOR_RT6,
+ MIDGARD_COLOR_RT7,
MIDGARD_ZS_RT,
MIDGARD_NUM_RTS,
};
/* Count of instructions emitted from NIR overall, across all blocks */
int instruction_count;
- /* Alpha ref value passed in */
- float alpha_ref;
-
unsigned quadword_count;
/* Bitmask of valid metadata */
void mir_set_bytemask(midgard_instruction *ins, uint16_t bytemask);
signed mir_upper_override(midgard_instruction *ins, unsigned inst_size);
unsigned mir_components_for_type(nir_alu_type T);
+unsigned max_bitsize_for_alu(midgard_instruction *ins);
+midgard_reg_mode reg_mode_for_bitsize(unsigned bitsize);
/* MIR printing */
.swizzle = SWIZZLE_IDENTITY,
.dest = dest,
.dest_type = nir_type_uint32,
- .alu = {
- .op = midgard_alu_op_imov,
- .reg_mode = midgard_reg_mode_32,
- .outmod = midgard_outmod_int_wrap
- },
+ .op = midgard_alu_op_imov,
+ .outmod = midgard_outmod_int_wrap
};
return ins;
.dest = ~0,
.src = { ~0, ~0, ~0, ~0 },
.swizzle = SWIZZLE_IDENTITY_4,
+ .op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4,
.load_store = {
- .op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4,
-
/* For register spilling - to thread local storage */
.arg_1 = 0xEA,
.arg_2 = 0x1E,
void midgard_nir_lod_errata(nir_shader *shader);
+unsigned midgard_get_first_tag_from_block(compiler_context *ctx, unsigned block_idx);
+
/* Optimizations */
bool midgard_opt_copy_prop(compiler_context *ctx, midgard_block *block);