return midgard_int_zero_extend;
}
-static unsigned
+unsigned
mir_pack_mod(midgard_instruction *ins, unsigned i, bool scalar)
{
bool integer = midgard_is_integer_op(ins->op);
}
static void
-mir_pack_mask_alu(midgard_instruction *ins)
+mir_pack_mask_alu(midgard_instruction *ins, midgard_vector_alu *alu)
{
unsigned effective = ins->mask;
if (upper_shift >= 0) {
effective >>= upper_shift;
- ins->alu.dest_override = upper_shift ?
+ alu->dest_override = upper_shift ?
midgard_dest_override_upper :
midgard_dest_override_lower;
} else {
- ins->alu.dest_override = midgard_dest_override_none;
+ alu->dest_override = midgard_dest_override_none;
}
if (inst_size == 32)
- ins->alu.mask = expand_writemask(effective, 2);
+ alu->mask = expand_writemask(effective, 2);
else if (inst_size == 64)
- ins->alu.mask = expand_writemask(effective, 1);
+ alu->mask = expand_writemask(effective, 1);
else
- ins->alu.mask = effective;
+ alu->mask = effective;
}
static unsigned
}
static void
-mir_pack_vector_srcs(midgard_instruction *ins)
+mir_pack_vector_srcs(midgard_instruction *ins, midgard_vector_alu *alu)
{
bool channeled = GET_CHANNEL_COUNT(alu_opcode_props[ins->op].props);
.half = half,
.swizzle = swizzle
};
-
+
unsigned p = vector_alu_srco_unsigned(pack);
if (i == 0)
- ins->alu.src1 = p;
+ alu->src1 = p;
else
- ins->alu.src2 = p;
+ alu->src2 = p;
}
}
}
}
+static midgard_load_store_word
+load_store_from_instr(midgard_instruction *ins)
+{
+ midgard_load_store_word ldst = ins->load_store;
+ ldst.op = ins->op;
+
+ if (OP_IS_STORE(ldst.op)) {
+ ldst.reg = SSA_REG_FROM_FIXED(ins->src[0]) & 1;
+ } else {
+ ldst.reg = SSA_REG_FROM_FIXED(ins->dest);
+ }
+
+ if (ins->src[1] != ~0) {
+ unsigned src = SSA_REG_FROM_FIXED(ins->src[1]);
+ unsigned sz = nir_alu_type_get_type_size(ins->src_types[1]);
+ ldst.arg_1 |= midgard_ldst_reg(src, ins->swizzle[1][0], sz);
+ }
+
+ if (ins->src[2] != ~0) {
+ unsigned src = SSA_REG_FROM_FIXED(ins->src[2]);
+ unsigned sz = nir_alu_type_get_type_size(ins->src_types[2]);
+ ldst.arg_2 |= midgard_ldst_reg(src, ins->swizzle[2][0], sz);
+ }
+
+ return ldst;
+}
+
+static midgard_texture_word
+texture_word_from_instr(midgard_instruction *ins)
+{
+ midgard_texture_word tex = ins->texture;
+ tex.op = ins->op;
+
+ unsigned src1 = ins->src[1] == ~0 ? REGISTER_UNUSED : SSA_REG_FROM_FIXED(ins->src[1]);
+ tex.in_reg_select = src1 & 1;
+
+ unsigned dest = ins->dest == ~0 ? REGISTER_UNUSED : SSA_REG_FROM_FIXED(ins->dest);
+ tex.out_reg_select = dest & 1;
+
+ if (ins->src[2] != ~0) {
+ midgard_tex_register_select sel = {
+ .select = SSA_REG_FROM_FIXED(ins->src[2]) & 1,
+ .full = 1,
+ .component = ins->swizzle[2][0]
+ };
+ uint8_t packed;
+ memcpy(&packed, &sel, sizeof(packed));
+ tex.bias = packed;
+ }
+
+ if (ins->src[3] != ~0) {
+ unsigned x = ins->swizzle[3][0];
+ unsigned y = x + 1;
+ unsigned z = x + 2;
+
+ /* Check range, TODO: half-registers */
+ assert(z < 4);
+
+ unsigned offset_reg = SSA_REG_FROM_FIXED(ins->src[3]);
+ tex.offset =
+ (1) | /* full */
+ (offset_reg & 1) << 1 | /* select */
+ (0 << 2) | /* upper */
+ (x << 3) | /* swizzle */
+ (y << 5) | /* swizzle */
+ (z << 7); /* swizzle */
+ }
+
+ return tex;
+}
+
static midgard_vector_alu
vector_alu_from_instr(midgard_instruction *ins)
{
- midgard_vector_alu alu = ins->alu;
- alu.op = ins->op;
- alu.outmod = ins->outmod;
- alu.reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins));
+ midgard_vector_alu alu = {
+ .op = ins->op,
+ .outmod = ins->outmod,
+ .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins))
+ };
+
+ if (ins->has_inline_constant) {
+ /* Encode inline 16-bit constant. See disassembler for
+ * where the algorithm is from */
+
+ int lower_11 = ins->inline_constant & ((1 << 12) - 1);
+ uint16_t imm = ((lower_11 >> 8) & 0x7) |
+ ((lower_11 & 0xFF) << 3);
+
+ alu.src2 = imm << 2;
+ }
+
return alu;
}
+static midgard_branch_extended
+midgard_create_branch_extended( midgard_condition cond,
+ midgard_jmp_writeout_op op,
+ unsigned dest_tag,
+ signed quadword_offset)
+{
+ /* The condition code is actually a LUT describing a function to
+ * combine multiple condition codes. However, we only support a single
+ * condition code at the moment, so we just duplicate over a bunch of
+ * times. */
+
+ uint16_t duplicated_cond =
+ (cond << 14) |
+ (cond << 12) |
+ (cond << 10) |
+ (cond << 8) |
+ (cond << 6) |
+ (cond << 4) |
+ (cond << 2) |
+ (cond << 0);
+
+ midgard_branch_extended branch = {
+ .op = op,
+ .dest_tag = dest_tag,
+ .offset = quadword_offset,
+ .cond = duplicated_cond
+ };
+
+ return branch;
+}
+
+static void
+emit_branch(midgard_instruction *ins,
+ compiler_context *ctx,
+ midgard_block *block,
+ midgard_bundle *bundle,
+ struct util_dynarray *emission)
+{
+ /* Parse some basic branch info */
+ bool is_compact = ins->unit == ALU_ENAB_BR_COMPACT;
+ bool is_conditional = ins->branch.conditional;
+ bool is_inverted = ins->branch.invert_conditional;
+ bool is_discard = ins->branch.target_type == TARGET_DISCARD;
+ bool is_tilebuf_wait = ins->branch.target_type == TARGET_TILEBUF_WAIT;
+ bool is_special = is_discard || is_tilebuf_wait;
+ bool is_writeout = ins->writeout;
+
+ /* Determine the block we're jumping to */
+ int target_number = ins->branch.target_block;
+
+ /* Report the destination tag */
+ int dest_tag = is_discard ? 0 :
+ is_tilebuf_wait ? bundle->tag :
+ midgard_get_first_tag_from_block(ctx, target_number);
+
+ /* Count up the number of quadwords we're
+ * jumping over = number of quadwords until
+ * (br_block_idx, target_number) */
+
+ int quadword_offset = 0;
+
+ if (is_discard) {
+ /* Ignored */
+ } else if (is_tilebuf_wait) {
+ quadword_offset = -1;
+ } else if (target_number > block->base.name) {
+ /* Jump forward */
+
+ for (int idx = block->base.name+1; idx < target_number; ++idx) {
+ midgard_block *blk = mir_get_block(ctx, idx);
+ assert(blk);
+
+ quadword_offset += blk->quadword_count;
+ }
+ } else {
+ /* Jump backwards */
+
+ for (int idx = block->base.name; idx >= target_number; --idx) {
+ midgard_block *blk = mir_get_block(ctx, idx);
+ assert(blk);
+
+ quadword_offset -= blk->quadword_count;
+ }
+ }
+
+ /* Unconditional extended branches (far jumps)
+ * have issues, so we always use a conditional
+ * branch, setting the condition to always for
+ * unconditional. For compact unconditional
+ * branches, cond isn't used so it doesn't
+ * matter what we pick. */
+
+ midgard_condition cond =
+ !is_conditional ? midgard_condition_always :
+ is_inverted ? midgard_condition_false :
+ midgard_condition_true;
+
+ midgard_jmp_writeout_op op =
+ is_discard ? midgard_jmp_writeout_op_discard :
+ is_tilebuf_wait ? midgard_jmp_writeout_op_tilebuffer_pending :
+ is_writeout ? midgard_jmp_writeout_op_writeout :
+ (is_compact && !is_conditional) ?
+ midgard_jmp_writeout_op_branch_uncond :
+ midgard_jmp_writeout_op_branch_cond;
+
+ if (is_compact) {
+ unsigned size = sizeof(midgard_branch_cond);
+
+ if (is_conditional || is_special) {
+ midgard_branch_cond branch = {
+ .op = op,
+ .dest_tag = dest_tag,
+ .offset = quadword_offset,
+ .cond = cond
+ };
+ memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size);
+ } else {
+ assert(op == midgard_jmp_writeout_op_branch_uncond);
+ midgard_branch_uncond branch = {
+ .op = op,
+ .dest_tag = dest_tag,
+ .offset = quadword_offset,
+ .unknown = 1
+ };
+ assert(branch.offset == quadword_offset);
+ memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size);
+ }
+ } else { /* `ins->compact_branch`, misnomer */
+ unsigned size = sizeof(midgard_branch_extended);
+
+ midgard_branch_extended branch =
+ midgard_create_branch_extended(
+ cond, op,
+ dest_tag,
+ quadword_offset);
+
+ memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size);
+ }
+}
+
static void
emit_alu_bundle(compiler_context *ctx,
+ midgard_block *block,
midgard_bundle *bundle,
struct util_dynarray *emission,
unsigned lookahead)
/* Check if this instruction has registers */
if (ins->compact_branch) continue;
+ unsigned src2_reg = REGISTER_UNUSED;
+ if (ins->has_inline_constant)
+ src2_reg = ins->inline_constant >> 11;
+ else if (ins->src[1] != ~0)
+ src2_reg = SSA_REG_FROM_FIXED(ins->src[1]);
+
/* Otherwise, just emit the registers */
uint16_t reg_word = 0;
- memcpy(®_word, &ins->registers, sizeof(uint16_t));
+ midgard_reg_info registers = {
+ .src1_reg = (ins->src[0] == ~0 ?
+ REGISTER_UNUSED :
+ SSA_REG_FROM_FIXED(ins->src[0])),
+ .src2_reg = src2_reg,
+ .src2_imm = ins->has_inline_constant,
+ .out_reg = (ins->dest == ~0 ?
+ REGISTER_UNUSED :
+ SSA_REG_FROM_FIXED(ins->dest)),
+ };
+ memcpy(®_word, ®isters, sizeof(uint16_t));
util_dynarray_append(emission, uint16_t, reg_word);
}
for (unsigned i = 0; i < bundle->instruction_count; ++i) {
midgard_instruction *ins = bundle->instructions[i];
- /* Where is this body */
- unsigned size = 0;
- void *source = NULL;
-
- midgard_vector_alu source_alu;
-
- /* In case we demote to a scalar */
- midgard_scalar_alu scalarized;
-
if (!ins->compact_branch) {
mir_lower_inverts(ins);
mir_lower_roundmode(ins);
}
- if (ins->unit & UNITS_ANY_VECTOR) {
- mir_pack_mask_alu(ins);
- mir_pack_vector_srcs(ins);
- size = sizeof(midgard_vector_alu);
- source_alu = vector_alu_from_instr(ins);
- source = &source_alu;
- } else if (ins->unit == ALU_ENAB_BR_COMPACT) {
- size = sizeof(midgard_branch_cond);
- source = &ins->br_compact;
- } else if (ins->compact_branch) { /* misnomer */
- size = sizeof(midgard_branch_extended);
- source = &ins->branch_extended;
+ if (midgard_is_branch_unit(ins->unit)) {
+ emit_branch(ins, ctx, block, bundle, emission);
+ } else if (ins->unit & UNITS_ANY_VECTOR) {
+ midgard_vector_alu source = vector_alu_from_instr(ins);
+ mir_pack_mask_alu(ins, &source);
+ mir_pack_vector_srcs(ins, &source);
+ unsigned size = sizeof(source);
+ memcpy(util_dynarray_grow_bytes(emission, size, 1), &source, size);
} else {
- size = sizeof(midgard_scalar_alu);
- source_alu = vector_alu_from_instr(ins);
- scalarized = vector_to_scalar_alu(source_alu, ins);
- source = &scalarized;
+ midgard_scalar_alu source = vector_to_scalar_alu(vector_alu_from_instr(ins), ins);
+ unsigned size = sizeof(source);
+ memcpy(util_dynarray_grow_bytes(emission, size, 1), &source, size);
}
-
- memcpy(util_dynarray_grow_bytes(emission, size, 1), source, size);
}
/* Emit padding (all zero) */
case TAG_ALU_8 + 4:
case TAG_ALU_12 + 4:
case TAG_ALU_16 + 4:
- emit_alu_bundle(ctx, bundle, emission, lookahead);
+ emit_alu_bundle(ctx, block, bundle, emission, lookahead);
break;
case TAG_LOAD_STORE_4: {
unsigned offset = bundle->instructions[i]->constants.u32[0];
if (offset) {
- unsigned shift = mir_ldst_imm_shift(bundle->instructions[i]->load_store.op);
+ unsigned shift = mir_ldst_imm_shift(bundle->instructions[i]->op);
unsigned upper_shift = 10 - shift;
bundle->instructions[i]->load_store.varying_parameters |= (offset & ((1 << upper_shift) - 1)) << shift;
}
}
- memcpy(¤t64, &bundle->instructions[0]->load_store, sizeof(current64));
+ midgard_load_store_word ldst0 =
+ load_store_from_instr(bundle->instructions[0]);
+ memcpy(¤t64, &ldst0, sizeof(current64));
- if (bundle->instruction_count == 2)
- memcpy(&next64, &bundle->instructions[1]->load_store, sizeof(next64));
+ if (bundle->instruction_count == 2) {
+ midgard_load_store_word ldst1 =
+ load_store_from_instr(bundle->instructions[1]);
+ memcpy(&next64, &ldst1, sizeof(next64));
+ }
midgard_load_store instruction = {
.type = bundle->tag,
ins->texture.next_type = next_tag;
/* Nothing else to pack for barriers */
- if (ins->texture.op == TEXTURE_OP_BARRIER) {
+ if (ins->op == TEXTURE_OP_BARRIER) {
ins->texture.cont = ins->texture.last = 1;
+ ins->texture.op = ins->op;
util_dynarray_append(emission, midgard_texture_word, ins->texture);
return;
}
ins->texture.sampler_type = midgard_sampler_type(ins->dest_type);
ins->texture.outmod = ins->outmod;
- if (mir_op_computes_derivatives(ctx->stage, ins->texture.op)) {
+ if (mir_op_computes_derivatives(ctx->stage, ins->op)) {
ins->texture.cont = !ins->helper_terminate;
ins->texture.last = ins->helper_terminate || ins->helper_execute;
} else {
ins->texture.cont = ins->texture.last = 1;
}
- util_dynarray_append(emission, midgard_texture_word, ins->texture);
+ midgard_texture_word texture = texture_word_from_instr(ins);
+ util_dynarray_append(emission, midgard_texture_word, texture);
break;
}
projects / mesa.git / blobdiff