panfrost: XMLify blend flags

[mesa.git] / src / panfrost / midgard / midgard_print.c

diff --git a/src/panfrost/midgard/midgard_print.c b/src/panfrost/midgard/midgard_print.c
index 3f72864f811e95110a39e96971a180bcf2f2a14a..b2b56f998620020edda9ac545c3fb7786aec4747 100644 (file)
--- a/src/panfrost/midgard/midgard_print.c
+++ b/src/panfrost/midgard/midgard_print.c
@@ -107,131 +107,6 @@ mir_get_unit(unsigned unit)
         }
 }
 
-void
-mir_print_constant_component(FILE *fp, const midgard_constants *consts, unsigned c,
-                             midgard_reg_mode reg_mode, bool half,
-                             unsigned mod, midgard_alu_op op)
-{
-        bool is_sint = false, is_uint = false, is_hex = false;
-        const char *opname = alu_opcode_props[op].name;
-
-        /* Add a sentinel name to prevent crashing */
-        if (!opname)
-                opname = "unknown";
-
-        if (opname[0] == 'u') {
-                /* If the opcode starts with a 'u' we are sure we deal with an
-                 * unsigned int operation
-                */
-                is_uint = true;
-       } else if (opname[0] == 'i') {
-                /* Bit ops are easier to follow when the constant is printed in
-                 * hexadecimal. Other operations starting with a 'i' are
-                 * considered to operate on signed integers. That might not
-                 * be true for all of them, but it's good enough for traces.
-                 */
-                if (op >= midgard_alu_op_iand &&
-                    op <= midgard_alu_op_ibitcount8)
-                        is_hex = true;
-                else
-                        is_sint = true;
-        }
-
-        if (half)
-                reg_mode--;
-
-        switch (reg_mode) {
-        case midgard_reg_mode_64:
-                if (is_sint) {
-                        fprintf(fp, "%"PRIi64, consts->i64[c]);
-                } else if (is_uint) {
-                        fprintf(fp, "%"PRIu64, consts->u64[c]);
-                } else if (is_hex) {
-                        fprintf(fp, "0x%"PRIX64, consts->u64[c]);
-                } else {
-                        double v = consts->f64[c];
-
-                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabs(v);
-                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
-
-                        printf("%g", v);
-                }
-                break;
-
-        case midgard_reg_mode_32:
-                if (is_sint) {
-                        int64_t v;
-
-                        if (half && mod == midgard_int_zero_extend)
-                                v = consts->u32[c];
-                        else if (half && mod == midgard_int_shift)
-                                v = (uint64_t)consts->u32[c] << 32;
-                        else
-                                v = consts->i32[c];
-
-                        fprintf(fp, "%"PRIi64, v);
-                } else if (is_uint || is_hex) {
-                        uint64_t v;
-
-                        if (half && mod == midgard_int_shift)
-                                v = (uint64_t)consts->u32[c] << 32;
-                        else
-                                v = consts->u32[c];
-
-                        fprintf(fp, is_uint ? "%"PRIu64 : "0x%"PRIX64, v);
-                } else {
-                        float v = consts->f32[c];
-
-                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabsf(v);
-                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
-
-                        fprintf(fp, "%g", v);
-                }
-                break;
-
-        case midgard_reg_mode_16:
-                if (is_sint) {
-                        int32_t v;
-
-                        if (half && mod == midgard_int_zero_extend)
-                                v = consts->u16[c];
-                        else if (half && mod == midgard_int_shift)
-                                v = (uint32_t)consts->u16[c] << 16;
-                        else
-                                v = consts->i16[c];
-
-                        fprintf(fp, "%d", v);
-                } else if (is_uint || is_hex) {
-                        uint32_t v;
-
-                        if (half && mod == midgard_int_shift)
-                                v = (uint32_t)consts->u16[c] << 16;
-                        else
-                                v = consts->u16[c];
-
-                        fprintf(fp, is_uint ? "%u" : "0x%X", v);
-                } else {
-                        float v = _mesa_half_to_float(consts->f16[c]);
-
-                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabsf(v);
-                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
-
-                        fprintf(fp, "%g", v);
-                }
-                break;
-
-        case midgard_reg_mode_8:
-                fprintf(fp, "0x%X", consts->u8[c]);
-
-                if (mod)
-                        fprintf(fp, " /* %u */", mod);
-
-                assert(!half); /* No 4-bit */
-
-                break;
-        }
-}
-
 static void
 mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
 {
@@ -375,9 +250,12 @@ mir_print_instruction(midgard_instruction *ins)
 
         printf(", ");
 
+        /* Only ALU can have an embedded constant, r26 as read on load/store is
+         * something else entirely */
+        bool is_alu = ins->type == TAG_ALU_4;
         unsigned r_constant = SSA_FIXED_REGISTER(REGISTER_CONSTANT);
 
-        if (ins->src[0] == r_constant)
+        if (ins->src[0] == r_constant && is_alu)
                 mir_print_embedded_constant(ins, 0);
         else
                 PRINT_SRC(ins, 0);
@@ -386,7 +264,7 @@ mir_print_instruction(midgard_instruction *ins)
 
         if (ins->has_inline_constant)
                 printf("#%d", ins->inline_constant);
-        else if (ins->src[1] == r_constant)
+        else if (ins->src[1] == r_constant && is_alu)
                 mir_print_embedded_constant(ins, 1);
         else
                 PRINT_SRC(ins, 1);