intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
authorJason Ekstrand <jason@jlekstrand.net>
Wed, 4 Mar 2020 19:56:30 +0000 (13:56 -0600)
committerMarge Bot <eric+marge@anholt.net>
Thu, 12 Mar 2020 17:51:28 +0000 (17:51 +0000)
commit05a8e981ad6d359c0d748fe9fdda5e1270d53d78
treec65fa9519616aaf7fc73d7b87d343be3a7faf31b
parentff1f0a720d8edcfc09aa41c720ba8de3afe88d72
intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode

We also delete the badly named isl_surf_supports_hiz_ccs_wt.  The name
is misleading because it doesn't return whether or not the surface
supports HiZ+CCS in write-through mode (any single-sampled HiZ+CCS
capable surface does) but rather a heuristic decision about whether or
not we want to enable write-through mode based on the usage flags in the
isl_surf.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
src/intel/isl/isl.c
src/intel/isl/isl.h
src/intel/isl/isl_emit_depth_stencil.c
src/intel/isl/isl_surface_state.c