i965/blorp: Make post draw flush more explicit
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Tue, 17 Jan 2017 10:00:37 +0000 (12:00 +0200)
committerTopi Pohjolainen <topi.pohjolainen@intel.com>
Wed, 18 Jan 2017 20:42:47 +0000 (22:42 +0200)
commit180653c357d19ca88f7895f59874a58fac99cc53
tree5fabc1417ba7bf43fc136960c53a07705ffe5169
parent46b346899d98e29943f8cd74c25bcb8d2f868a49
i965/blorp: Make post draw flush more explicit

Blits do not need any special treatment as the target buffer
object is added to render cache just as one does for normal draw.
Color clears and resolves in turn require explicit "end of pipe
synchronization". It is not clear what this means exactly but the
assumption is that render cache flush with command stream stall
should be sufficient.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/mesa/drivers/dri/i965/brw_blorp.c
src/mesa/drivers/dri/i965/genX_blorp_exec.c