Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"
authorKenneth Graunke <kenneth@whitecape.org>
Mon, 23 Sep 2019 23:30:29 +0000 (16:30 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Mon, 23 Sep 2019 23:31:23 +0000 (16:31 -0700)
commit50c0dd8621c9e9ff7227a7d4fc8b61d61b61baf5
tree44f42c861cbdd2fd2c5dc47d8e2a43726ffa6c70
parent03911195a32e9c00b07de2c5cdc6a4a70ae2284b
Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"

This reverts commit 729de1488f49033bc181b8123af5658228a51bf1.

It turns out that, although the register is in the logical context,
it isn't whitelisted, so we can't actually write it from userspace
batch buffers.  The write just becomes a noop, which is why we saw
no performance changes.

I manually whitelisted it, and still observed no performance gains, but
it did regress KHR-GL46.texture_cube_map_array.color_depth_attachments
on the iris driver.  So we might need to fix something before enabling
this.  To prevent it randomly getting turned on should the kernel ever
whitelist this register, we revert the patch for now.
src/gallium/drivers/iris/iris_state.c
src/intel/vulkan/genX_state.c
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_state_upload.c