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(parent: 37622ec) | patch
etnaviv: align TS surface size to number of pixel pipes
authorLucas Stach <l.stach@pengutronix.de>
Mon, 21 Nov 2016 11:27:47 +0000 (12:27 +0100)
committerLucas Stach <l.stach@pengutronix.de>
Tue, 11 Apr 2017 14:52:22 +0000 (16:52 +0200)
commit52f6c8cc31f553ba2005892fcf2ca9b5f10bac91
tree6d47af373c2d8c5c6c434468335def047416c405tree
parent37622ecc795e655ab0264c44dbe6188d9d9d3813commit | diff
etnaviv: align TS surface size to number of pixel pipes

The TS surface gets cleared by a tiled RS fill. If the chip has
more than 1 pixel pipe the size of the TS surface needs to be
aligned so that each pipe address matches a tile start, otherwise
the RS will hang.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
src/gallium/drivers/etnaviv/etnaviv_resource.c diff | blob | history