intel/fs: Implement the new load/store_scratch intrinsics
authorJason Ekstrand <jason.ekstrand@intel.com>
Thu, 28 Feb 2019 14:15:30 +0000 (08:15 -0600)
committerJason Ekstrand <jason@jlekstrand.net>
Mon, 11 Nov 2019 17:17:02 +0000 (17:17 +0000)
commit53bfcdeecf4c9632e09ee641d2ca02dd9ec25e34
tree0eb1361a0f6684b5a6fc1474d482b258cbae1839
parente2297699de8eda49fb2c2c54307b44d4097d0b95
intel/fs: Implement the new load/store_scratch intrinsics

This commit fills in a number of different pieces:

 1. We add support to brw_nir_lower_mem_access_bit_sizes to handle the
    new intrinsics.  This involves simple plumbing work as well as a
    tiny bit of extra logic to always scalarize scratch intrinsics

 2. Add code to brw_fs_nir.cpp to turn nir_load/store_scratch intrinsics
    into byte/dword scattered read/write messages which use the A32
    stateless model.

 3. Add code to lower_surface_logical_send to handle dword scattered
    messages and the A32 stateless model.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
src/intel/compiler/brw_fs.cpp
src/intel/compiler/brw_fs.h
src/intel/compiler/brw_fs_generator.cpp
src/intel/compiler/brw_fs_nir.cpp
src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c