intel,nir: Lower TXD with min_lod when the sampler index is not < 16
authorJason Ekstrand <jason.ekstrand@intel.com>
Fri, 8 Feb 2019 23:51:24 +0000 (17:51 -0600)
committerJason Ekstrand <jason@jlekstrand.net>
Mon, 4 Mar 2019 23:56:39 +0000 (23:56 +0000)
commit5c96120b5ce158fea28d751d8a55b5e4d80df4f3
treeeef1bc4ec634ceb27c6691cc08737181580941f6
parentca295ddbfb414a526d3bab7daf93fffbbc417c6e
intel,nir: Lower TXD with min_lod when the sampler index is not < 16

When we have a larger sampler index, we get into the "high sampler"
scenario and need an instruction header.  Even in SIMD8, this pushes the
instruction over the sampler message size maximum of 11 registers.
Instead, we have to lower TXD to TXL.

Fixes: cb98e0755f8d "intel/fs: Support min_lod parameters on texture..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
src/compiler/nir/nir.h
src/compiler/nir/nir_lower_tex.c
src/intel/compiler/brw_nir.c