nir: Add a new memory_barrier_tcs_patch intrinsic
authorJason Ekstrand <jason@jlekstrand.net>
Tue, 7 Jan 2020 20:18:56 +0000 (14:18 -0600)
committerMarge Bot <eric+marge@anholt.net>
Mon, 13 Jan 2020 17:23:47 +0000 (17:23 +0000)
commit60097cc840e33af8506d7d4d621fefdca1a77695
treee640745cc4074f8618110cc52d3267029ac2ac41
parentf2eece773c24ed3354b2634647005de6a9ff6d6d
nir: Add a new memory_barrier_tcs_patch intrinsic

Right now, it's implemented as a no-op for everyone.  For most drivers,
it's a switch case in the NIR -> whatever which just breaks.  For ir3,
they already have code to delete tessellation barriers so we just add a
case to also delete memory_barrier_tcs_patch.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
12 files changed:
src/amd/compiler/aco_instruction_selection.cpp
src/amd/llvm/ac_nir_to_llvm.c
src/broadcom/compiler/nir_to_vir.c
src/compiler/nir/nir_intrinsics.py
src/compiler/nir/nir_opt_combine_stores.c
src/compiler/nir/nir_opt_copy_prop_vars.c
src/compiler/nir/nir_opt_dead_write_vars.c
src/freedreno/ir3/ir3_nir_lower_tess.c
src/gallium/auxiliary/gallivm/lp_bld_nir.c
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
src/intel/compiler/brw_fs_nir.cpp
src/intel/compiler/brw_vec4_tcs.cpp