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(parent: 49c2180) | patch
intel/compiler: Don't disassemble align1 3-src operands on Gen < 10
authorMatt Turner <mattst88@gmail.com>
Tue, 21 Jan 2020 18:44:59 +0000 (10:44 -0800)
committerMarge Bot <eric+marge@anholt.net>
Wed, 22 Jan 2020 00:19:20 +0000 (00:19 +0000)
commit713c123bfa90fa845cf603a2d82a338b363cb4ee
tree7cb849098205a48bb50680180e17923f8e2edd61tree
parent49c21802cbca8240b272318759b1e472142929e6commit | diff
intel/compiler: Don't disassemble align1 3-src operands on Gen < 10

Since the platforms don't support align1 3-src instructions, the
contents of these operands are not going to be meaningful. Just don't
print them to avoid hitting some assertions in brw_inst functions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
src/intel/compiler/brw_disasm.c diff | blob | history