i965: Add opcodes for F32TO16 and F16TO32
authorChad Versace <chad.versace@linux.intel.com>
Wed, 9 Jan 2013 19:35:47 +0000 (11:35 -0800)
committerChad Versace <chad.versace@linux.intel.com>
Fri, 25 Jan 2013 05:24:10 +0000 (21:24 -0800)
commit7e21910f233a8ff6e2c4adaee6b4edd2f70b6c68
treea58eea19e3e1eabc0f7229e2737a518c360e04ee
parentee0ed52d69b3c3c10e344acae7ca901b4e9a03fa
i965: Add opcodes for F32TO16 and F16TO32

The GLSL ES 3.00 operations packHalf2x16 and unpackHalf2x16 will emit
these opcodes.

- Define the opcodes BRW_OPCODE_{F32TO16,F16TO32}.
- Add the opcodes to the brw_disasm table.
- Define convenience functions brw_{F32TO16,F16TO32}.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_disasm.c
src/mesa/drivers/dri/i965/brw_eu.h
src/mesa/drivers/dri/i965/brw_eu_emit.c