i965: Set the "Float Blend Optimization Enable" bit on Gen9+.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 24 May 2017 04:03:14 +0000 (21:03 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 30 May 2017 21:59:31 +0000 (14:59 -0700)
commita8fde221a8f9a561c592a7d51a656d10037c7912
tree46039ad84e1fbcae96bdee1c965b12e6e276bb12
parent9601b41a33bf6594366eedf6cc4d1c88804a41b7
i965: Set the "Float Blend Optimization Enable" bit on Gen9+.

This is woefully undocumented.  It's some kind of optimization that
avoids unnecessary render target reads when blending with a floating
point render target, using independent alpha blending modes.

The internal documentation indicates that this bit exists on Cherryview
as well, but the other driver doesn't appear to set it on that platform.
There's also some confusing wording that indicates that it may exist on
Broadwell, but the documentation says it's reserved, so who knows.

I was not able to find any workload that benefited from setting this
bit, but it seems like a good idea to set it nonetheless.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_state_upload.c