i965/gen8: Don't add workaround bits to PIPE_CONTROL stalls if DC flush is set.
authorFrancisco Jerez <currojerez@riseup.net>
Thu, 3 Sep 2015 14:19:10 +0000 (17:19 +0300)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 9 Dec 2015 11:46:05 +0000 (13:46 +0200)
commitc8ff045fdbe4a1a9eddc4c36750a228cfb7770ba
treea84a7da557a79c7fefa378d7aeaaaabd126a03d1
parent2405b75bc9c6b9fa9583e926bca313ed89911bc7
i965/gen8: Don't add workaround bits to PIPE_CONTROL stalls if DC flush is set.

According to the hardware docs a DC flush is sufficient to make
CS_STALL happy, there's no need to add STALL_AT_SCOREBOARD whenever
it's present.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
src/mesa/drivers/dri/i965/brw_pipe_control.c