intel/ir: Allow representing additional flag subregisters in the IR.
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 12 Dec 2017 20:05:02 +0000 (12:05 -0800)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 2 Mar 2018 19:28:56 +0000 (11:28 -0800)
commitcc0fc8b8ac608b036d260007a689eeeb8e815031
treeaa6f8eb8154874a108154560992a7aa6946da791
parent9ec3362e0ba293f20d08493753edeb29d13baadf
intel/ir: Allow representing additional flag subregisters in the IR.

This allows representing conditional mods and predicates on f1.0-f1.1
at the IR level by adding an extra bit to the flag_subreg
backend_instruction field.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_fs.cpp
src/intel/compiler/brw_fs_generator.cpp
src/intel/compiler/brw_reg.h
src/intel/compiler/brw_schedule_instructions.cpp
src/intel/compiler/brw_shader.h
src/intel/compiler/brw_vec4.cpp
src/intel/compiler/brw_vec4_generator.cpp