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(parent: 34a0ce5) | patch
intel/genxml: add PIPE_CONTROL command cache invalidate bit
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Sun, 2 Feb 2020 13:25:16 +0000 (14:25 +0100)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 20 May 2020 11:02:27 +0000 (14:02 +0300)
commitcc13bfbd05934f4053b633627f5bd2ef1108537b
treef7e8965ba3d8377ee66ed79bb8edac6763246cb8tree
parent34a0ce58c7f85ea3ec3f1026469ce06602f38a5bcommit | diff
intel/genxml: add PIPE_CONTROL command cache invalidate bit

This new bit invalidates the cache/prefetch of commands in the command
streamer. This will be useful for self modifying batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
src/intel/genxml/gen11.xml diff | blob | history
src/intel/genxml/gen12.xml diff | blob | history