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(parent: 3e7cebc) | patch
i965: Update assertion to account for Gen < 7
authorIan Romanick <ian.d.romanick@intel.com>
Tue, 28 Jun 2016 21:48:22 +0000 (14:48 -0700)
committerIan Romanick <ian.d.romanick@intel.com>
Tue, 19 Jul 2016 19:19:29 +0000 (12:19 -0700)
commitd7a47a76e0c6ccd1765f4c10c390e7d4f5f86414
treed7173112ff67fcc13a69802b2eab5ae7602a57e9tree
parent3e7cebc8da5c9f16fa1b9a25ea72b8d31c86a440commit | diff
i965: Update assertion to account for Gen < 7

Previously SHADER_OPCODE_MULH could only exist on Gen7+, so the
assertion assumed the Gen7+ accumulator rules.  A future patch will
allow this instruction on at least Gen6, so update the assertion.

v2: Use get_lowered_simd_width instead of open coding it.  Suggested by
Curro.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
src/mesa/drivers/dri/i965/brw_fs.cpp diff | blob | history