i965: Port Gen6+ DEPTH_STENCIL state to genxml.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 8 Mar 2017 05:54:24 +0000 (21:54 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Thu, 4 May 2017 01:57:51 +0000 (18:57 -0700)
commitdae5cc79c683715f296aea17047b73a980117e8c
treedcb5cccdb4ce6085d2b140d2554f4d868bea084e
parent5a19d0bcecd62a55cfe7f0e7107cd33c957a1b04
i965: Port Gen6+ DEPTH_STENCIL state to genxml.

This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE
(and the relevant pointer packets) on Gen6-7.5 from a single function.

v3:
   - Watch for BRW_NEW_BATCH too on gen < 8 (Ken)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/Makefile.sources
src/mesa/drivers/dri/i965/brw_state.h
src/mesa/drivers/dri/i965/gen6_depthstencil.c [deleted file]
src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c [deleted file]
src/mesa/drivers/dri/i965/genX_state_upload.c