r600g: implement NV_primitive_restart functionality (v2)

Needed for GL3.

v2: evergreen support

I don't set PA_SU_SC_MODE_CNTL.MULTI_PRIM_IB_ENA.
piglit/primitive-restart does pass though. Tested on RV730 and EG-REDWOOD.

diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index 96dbd4da91b487122d9dd863e45eaa6a0b628e6a..9a8c353e4ee2fce3d60d183464b8d913dcef43e2 100644 (file)
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -1697,6 +1697,10 @@
 #define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL           0x00028A3C
 #define R_028A48_PA_SC_MODE_CNTL_0                   0x00028A48
 #define R_028A4C_PA_SC_MODE_CNTL_1                   0x00028A4C
+#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN          0x00028A94
+#define   S_028A94_RESET_EN(x)                         (((x) & 0x1) << 0)
+#define   G_028A94_RESET_EN(x)                         (((x) >> 0) & 0x1)
+#define   C_028A94_RESET_EN                            0xFFFFFFFE
 #define R_028AB4_VGT_REUSE_OFF                       0x00028AB4
 #define R_028AB8_VGT_VTX_CNT_EN                      0x00028AB8
 #define R_028ABC_DB_HTILE_SURFACE                    0x00028ABC

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 4cf02c9b18e66395c63ea4444dca0a6c917db7f5..d180e36aa162ee93fd759dcde59f2413ed282b83 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -360,6 +360,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_SM3:
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
        case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
+       case PIPE_CAP_PRIMITIVE_RESTART:
                return 1;
 
        /* Supported except the original R600. */
@@ -374,7 +375,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        /* Unsupported features. */
        case PIPE_CAP_STREAM_OUTPUT:
-       case PIPE_CAP_PRIMITIVE_RESTART:
        case PIPE_CAP_TGSI_INSTANCEID:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 53a1313a2a8b0b561ea4b5f4f9246e003c1161f8..853458f0156661adf92746516b27c958ee1fa385 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -619,6 +619,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
                r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, draw.info.restart_index, 0xFFFFFFFF, NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, draw.info.primitive_restart, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, draw.info.start_instance, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL,
@@ -633,6 +635,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
        r600_pipe_state_mod_reg(&rctx->vgt, draw.info.max_index);
        r600_pipe_state_mod_reg(&rctx->vgt, draw.info.min_index);
        r600_pipe_state_mod_reg(&rctx->vgt, draw.info.index_bias);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.restart_index);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.primitive_restart);
        r600_pipe_state_mod_reg(&rctx->vgt, 0);
        r600_pipe_state_mod_reg(&rctx->vgt, draw.info.start_instance);
        if (draw.info.mode == PIPE_PRIM_QUADS || draw.info.mode == PIPE_PRIM_QUAD_STRIP || draw.info.mode == PIPE_PRIM_POLYGON) {

diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index 30bb0b8223cf49dd5b3cf37f4ac03419b8020591..3417eb39192259a0adf56bc1111f432dff1c1bb8 100644 (file)
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -159,6 +159,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028404_VGT_MIN_VTX_INDX, 0, 0, 0},
        {R_028408_VGT_INDX_OFFSET, 0, 0, 0},
        {R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0, 0},
+       {R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0, 0},
        {GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
        {R_028410_SX_ALPHA_TEST_CONTROL, 0, 0, 0},
        {R_028414_CB_BLEND_RED, 0, 0, 0},
@@ -523,6 +524,7 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028404_VGT_MIN_VTX_INDX, 0, 0, 0},
        {R_028408_VGT_INDX_OFFSET, 0, 0, 0},
        {R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0, 0},
+       {R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0, 0},
        {GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
        {R_028410_SX_ALPHA_TEST_CONTROL, 0, 0, 0},
        {R_028414_CB_BLEND_RED, 0, 0, 0},