amd: rename SIENNA -> SIENNA_CICHLID

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100>

diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h
index 3307f1941a648ce26236dd605b52d4a6dea3e11c..5f7d797f2c8b92d5a32d555606d29663045923b7 100644 (file)
--- a/src/amd/addrlib/src/amdgpu_asic_addr.h
+++ b/src/amd/addrlib/src/amdgpu_asic_addr.h
@@ -97,7 +97,7 @@
 #define AMDGPU_NAVI10_RANGE     0x01, 0x0A
 #define AMDGPU_NAVI12_RANGE     0x0A, 0x14
 #define AMDGPU_NAVI14_RANGE     0x14, 0x28
 #define AMDGPU_NAVI10_RANGE     0x01, 0x0A
 #define AMDGPU_NAVI12_RANGE     0x0A, 0x14
 #define AMDGPU_NAVI14_RANGE     0x14, 0x28

-#define AMDGPU_SIENNA_RANGE     0x28, 0x32
+#define AMDGPU_SIENNA_CICHLID_RANGE     0x28, 0x32

 
 #define AMDGPU_EXPAND_FIX(x) x
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
 
 #define AMDGPU_EXPAND_FIX(x) x
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))


@@ -145,6 +145,6 @@
 #define ASICREV_IS_NAVI10_P(r)         ASICREV_IS(r, NAVI10)
 #define ASICREV_IS_NAVI12(r)           ASICREV_IS(r, NAVI12)
 #define ASICREV_IS_NAVI14(r)           ASICREV_IS(r, NAVI14)
 #define ASICREV_IS_NAVI10_P(r)         ASICREV_IS(r, NAVI10)
 #define ASICREV_IS_NAVI12(r)           ASICREV_IS(r, NAVI12)
 #define ASICREV_IS_NAVI14(r)           ASICREV_IS(r, NAVI14)

-#define ASICREV_IS_SIENNA_M(r)         ASICREV_IS(r, SIENNA)
+#define ASICREV_IS_SIENNA_CICHLID(r)   ASICREV_IS(r, SIENNA_CICHLID)

 
 #endif // _AMDGPU_ASIC_ADDR_H
 
 #endif // _AMDGPU_ASIC_ADDR_H

diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
index 454f57543d4f85e63ce997075eca86ee06a59485..2050cf4b150c60b750caf52b1533ff0615028d4f 100644 (file)
--- a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
+++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
@@ -922,7 +922,7 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily(
         case FAMILY_NV:
             m_settings.isDcn2 = 1;
 
         case FAMILY_NV:
             m_settings.isDcn2 = 1;
 

-            if (ASICREV_IS_SIENNA_M(chipRevision))
+            if (ASICREV_IS_SIENNA_CICHLID(chipRevision))

             {
                 m_settings.supportRbPlus   = 1;
                 m_settings.dccUnsup3DSwDis = 0;
             {
                 m_settings.supportRbPlus   = 1;
                 m_settings.dccUnsup3DSwDis = 0;

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 797de243b407eb2c481049cd09bd1bc1c90615c8..f054edba1cebc7dfe45df4f0986497a348036fa3 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -409,7 +409,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                identify_chip(NAVI10);
                identify_chip(NAVI12);
                identify_chip(NAVI14);
                identify_chip(NAVI10);
                identify_chip(NAVI12);
                identify_chip(NAVI14);

-               identify_chip(SIENNA);
+               identify_chip(SIENNA_CICHLID);

                break;
        }
 
                break;
        }
 


@@ -419,7 +419,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                return false;
        }
 
                return false;
        }
 

-       if (info->family >= CHIP_SIENNA)
+       if (info->family >= CHIP_SIENNA_CICHLID)

                info->chip_class = GFX10_3;
        else if (info->family >= CHIP_NAVI10)
                info->chip_class = GFX10;
                info->chip_class = GFX10_3;
        else if (info->family >= CHIP_NAVI10)
                info->chip_class = GFX10;


@@ -741,7 +741,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                case CHIP_RENOIR:
                case CHIP_NAVI10:
                case CHIP_NAVI12:
                case CHIP_RENOIR:
                case CHIP_NAVI10:
                case CHIP_NAVI12:

-               case CHIP_SIENNA:
+               case CHIP_SIENNA_CICHLID:

                        pc_lines = 1024;
                        break;
                case CHIP_NAVI14:
                        pc_lines = 1024;
                        break;
                case CHIP_NAVI14:

diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index f546c4f96e988bc7d2ffdd8fc56703a76131de46..7f581c4945a4d52dc08b6af3f9619ce9b7c7ebe6 100644 (file)
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -102,7 +102,7 @@ enum radeon_family {
     CHIP_NAVI10,
     CHIP_NAVI12,
     CHIP_NAVI14,
     CHIP_NAVI10,
     CHIP_NAVI12,
     CHIP_NAVI14,

-    CHIP_SIENNA,
+    CHIP_SIENNA_CICHLID,

     CHIP_LAST,
 };
 
     CHIP_LAST,
 };
 

diff --git a/src/amd/llvm/ac_llvm_util.c b/src/amd/llvm/ac_llvm_util.c
index 937e0dbf1fbfb555ce93b60a4b255c7734ceda41..8edef9c352277eaed54b81380e87ce6881c958d1 100644 (file)
--- a/src/amd/llvm/ac_llvm_util.c
+++ b/src/amd/llvm/ac_llvm_util.c
@@ -156,7 +156,7 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
                return "gfx1011";
        case CHIP_NAVI14:
                return "gfx1012";
                return "gfx1011";
        case CHIP_NAVI14:
                return "gfx1012";

-       case CHIP_SIENNA:
+       case CHIP_SIENNA_CICHLID:

                return "gfx1030";
        default:
                return "";
                return "gfx1030";
        default:
                return "";

diff --git a/src/amd/vulkan/winsys/null/radv_null_winsys.c b/src/amd/vulkan/winsys/null/radv_null_winsys.c
index 462ed8bfd1e3116eb2e54b37348e2327e048a991..f8b7bf6ad786c1e8d0f05d7fd9a06e7e4e2f8fbe 100644 (file)
--- a/src/amd/vulkan/winsys/null/radv_null_winsys.c
+++ b/src/amd/vulkan/winsys/null/radv_null_winsys.c
@@ -80,7 +80,7 @@ static void radv_null_winsys_query_info(struct radeon_winsys *rws,
                        info->family = i;
                        info->name = "OVERRIDDEN";
 
                        info->family = i;
                        info->name = "OVERRIDDEN";
 

-                       if (i >= CHIP_SIENNA)
+                       if (i >= CHIP_SIENNA_CICHLID)

                                info->chip_class = GFX10_3;
                        else if (i >= CHIP_NAVI10)
                                info->chip_class = GFX10;
                                info->chip_class = GFX10_3;
                        else if (i >= CHIP_NAVI10)
                                info->chip_class = GFX10;

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 3854fad8b4d0e3c359492e0521e7c91c1e6de152..038546f56d45307d9999bdae2b8a0792a5c4b683 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -826,7 +826,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
                        dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
                          ? align(dec->base.width, 64)
                          : align(dec->base.width, 32);
                        dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
                          ? align(dec->base.width, 64)
                          : align(dec->base.width, 32);

-   if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA &&
+   if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA_CICHLID &&

        dec->stream_type == RDECODE_CODEC_VP9)
       decode->db_aligned_height = align(dec->base.height, 64);
 
        dec->stream_type == RDECODE_CODEC_VP9)
       decode->db_aligned_height = align(dec->base.height, 64);
 


@@ -1589,7 +1589,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
       dec->jpg.direct_reg = true;
       break;
    case CHIP_ARCTURUS:
       dec->jpg.direct_reg = true;
       break;
    case CHIP_ARCTURUS:

-   case CHIP_SIENNA:
+   case CHIP_SIENNA_CICHLID:

       dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
       dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
       dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;
       dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
       dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
       dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
index 13ac891b34e586df15a726d13ee715c08e24d983..9b7403d0cee08870e26c8003c6505b1afee4ef0b 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
@@ -441,7 +441,7 @@ struct pipe_video_codec *radeon_create_encoder(struct pipe_context *context,
       goto error;
    }
 
       goto error;
    }
 

-   if (sscreen->info.family >= CHIP_SIENNA)
+   if (sscreen->info.family >= CHIP_SIENNA_CICHLID)

       radeon_enc_3_0_init(enc);
    else if (sscreen->info.family >= CHIP_RENOIR)
       radeon_enc_2_0_init(enc);
       radeon_enc_3_0_init(enc);
    else if (sscreen->info.family >= CHIP_RENOIR)
       radeon_enc_2_0_init(enc);

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index da9a44e8c84b5bc8af5f5cc0cbadaab08bad667d..e91524447ce14364545d4734f03b53541a2fd797 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -63,7 +63,7 @@ static void handle_env_var_force_family(struct amdgpu_winsys *ws)
             ws->info.family = i;
             ws->info.name = "GCN-NOOP";
 
             ws->info.family = i;
             ws->info.name = "GCN-NOOP";
 

-            if (i >= CHIP_SIENNA)
+            if (i >= CHIP_SIENNA_CICHLID)

                ws->info.chip_class = GFX10_3;
             else if (i >= CHIP_NAVI10)
                ws->info.chip_class = GFX10;
                ws->info.chip_class = GFX10_3;
             else if (i >= CHIP_NAVI10)
                ws->info.chip_class = GFX10;