radv: enable HTILE for images that might need variable sample locations

This is now supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index afb426fc3c588b4c02be54446decf62590f036e4..777af25445cfd5b603ade82a568df38deef7d4b4 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -76,13 +76,6 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
            (pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT))
                return false;
 
-       /* TODO: Implement layout transitions with variable sample locations
-        * before enabling HTILE for depth/stencil images created with this
-        * flags because the depth decompress pass needs to know them.
-        */
-       if (pCreateInfo->flags & VK_IMAGE_CREATE_SAMPLE_LOCATIONS_COMPATIBLE_DEPTH_BIT_EXT)
-               return false;
-
        if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR)
                return false;