gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS
authorMarek Olšák <marek.olsak@amd.com>
Wed, 23 May 2018 21:45:50 +0000 (17:45 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 31 Jul 2018 22:28:41 +0000 (18:28 -0400)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
18 files changed:
src/gallium/docs/source/screen.rst
src/gallium/drivers/etnaviv/etnaviv_screen.c
src/gallium/drivers/freedreno/freedreno_screen.c
src/gallium/drivers/i915/i915_screen.c
src/gallium/drivers/llvmpipe/lp_screen.c
src/gallium/drivers/nouveau/nv30/nv30_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/si_get.c
src/gallium/drivers/softpipe/sp_screen.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/drivers/swr/swr_screen.cpp
src/gallium/drivers/v3d/v3d_screen.c
src/gallium/drivers/vc4/vc4_screen.c
src/gallium/drivers/virgl/virgl_screen.c
src/gallium/include/pipe/p_defines.h

index d7ce521c2c37a60480986ef47a553037fe6cfa3f..5fc49e24403833bda313c69c041152a09fec20d2 100644 (file)
@@ -411,6 +411,17 @@ The integer capabilities:
 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
   output resources (images + buffers + fragment outputs). If 0 the state
   tracker works it out.
+* ``PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS``: This determines limitations
+  on the number of samples that framebuffer attachments can have.
+  Possible values:
+    0: color.nr_samples == zs.nr_samples == color.nr_storage_samples
+       (standard MSAA quality)
+    1: color.nr_samples >= zs.nr_samples == color.nr_storage_samples
+       (enhanced MSAA quality)
+    2: color.nr_samples >= zs.nr_samples >= color.nr_storage_samples
+       (full flexibility in tuning MSAA quality and performance)
+  All color attachments must have the same number of samples and the same
+  number of storage samples.
 * ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``:
   Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf
   module needs this for optimal performance in workstation applications.
index 04c7a873de651a447adc5e15c81b9199f18a2598..d4abf99947e25feb9093d423bc199dc9f11a693a 100644 (file)
@@ -270,6 +270,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 5aefc3d74b9c9a49e616bad9edcc55d5d7b3fc1d..4d54446ec7ec37d14781a34edb11c1fc75788a84 100644 (file)
@@ -354,6 +354,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
        case PIPE_CAP_TILE_RASTER_ORDER:
        case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
        case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
        case PIPE_CAP_FENCE_SIGNAL:
        case PIPE_CAP_CONSTBUF0_FLAGS:
index a03840a3aa48a23f566f3cd5585656d36c705598..132a9fce034b43abe993eb377da4634eac0fe76b 100644 (file)
@@ -328,6 +328,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 9921a941d5870cb8d59882837bb8a7458822e768..0d0a34543753fd871c008a4886bd4e7e97da0170 100644 (file)
@@ -359,6 +359,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 155ddeef65ec61d4466350e4f0641cdecf09a58f..bddb2e6a385180cd507400302669b28e17205b21 100644 (file)
@@ -225,6 +225,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 44a1a8a9374bdfb6bfef993c0fcac80d077ea2eb..9f8bb46507aa522734c400eaf8642d1d40cb2592 100644 (file)
@@ -275,6 +275,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index bcd30b560bc27134cda15d2fa4b64232a1a2c72c..a206db38b322b06d071efdc843528f6058f5473c 100644 (file)
@@ -304,6 +304,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 3331a6e90ffd6808c4c68b9ed70b6c09ebd3b0d1..06168090829ac6b1eb75777b9ddea645cf5f0efe 100644 (file)
@@ -247,6 +247,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
         case PIPE_CAP_TILE_RASTER_ORDER:
         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+        case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
         case PIPE_CAP_FENCE_SIGNAL:
index 25180321455d35121aaec7e862c4260d2ce8f733..ffed69a081ea65738d219df364ae33e6e98953f9 100644 (file)
@@ -422,6 +422,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FENCE_SIGNAL:
        case PIPE_CAP_CONSTBUF0_FLAGS:
        case PIPE_CAP_PACKED_UNIFORMS:
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
        case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
        case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
        case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
index b8ee8734379d726381dd07c3013adc4e0e9b6aed..6e804797bab1586a3a6eedebcc79c9ecd1b9c144 100644 (file)
@@ -312,6 +312,8 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
        case PIPE_CAP_MAX_RENDER_TARGETS:
                return 8;
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
+               return sscreen->info.has_eqaa_surface_allocator ? 2 : 0;
 
        case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
        case PIPE_CAP_MIN_TEXEL_OFFSET:
index ed8f8d9112db1721986cf206781ed3d728696170..207ecc755bb5f52dce9803824f3b10f2eae9cd12 100644 (file)
@@ -311,6 +311,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 9d9b7971b4683c7df8b9f3bd02db28d917a70a19..b8f936ee96730d97c57029dfd160bb8ef6361555 100644 (file)
@@ -463,6 +463,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 65fa1bc50e62de690067cbcdb89d6b565f25f935..19d6f442c53a4f8a8c404932ecc3d54b4b979ef0 100644 (file)
@@ -344,6 +344,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index e08239fd7f6a3170c0e394bfa1e5fe40a9b3a0d9..b274f2de5a8210d755b0cd498c29192b8ed4609f 100644 (file)
@@ -261,6 +261,7 @@ v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
         case PIPE_CAP_TILE_RASTER_ORDER:
         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
         case PIPE_CAP_CONSTBUF0_FLAGS:
         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
index 17776fa4d9b08746e5d75ca6fa25232be9826bc2..1bd60d1084248eff28f0b9012b6bba4ea83a7666 100644 (file)
@@ -287,6 +287,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
         case PIPE_CAP_LOAD_CONSTBUF:
         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
         case PIPE_CAP_FENCE_SIGNAL:
index 01e8eaec72085cac6d38e9392a2173eb7463b70d..cfa0e8ba7d4bb0ff5718e227736eddd7cc416496 100644 (file)
@@ -286,6 +286,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
    case PIPE_CAP_TILE_RASTER_ORDER:
    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
    case PIPE_CAP_FENCE_SIGNAL:
index 02e0c80f1933ee8f54ea3c33af0b88f77838b17f..9909b2b9ae09eb9b1c1f40eef1e084e13306bbd7 100644 (file)
@@ -802,6 +802,7 @@ enum pipe_cap
    PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS,
    PIPE_CAP_TILE_RASTER_ORDER,
    PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES,
+   PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS,
    PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET,
    PIPE_CAP_CONTEXT_PRIORITY_MASK,
    PIPE_CAP_FENCE_SIGNAL,