ac: declare an enum for the OOB select field on GFX10

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index b92d7c0eb5f970fb1e8e7b5abb999b916f15b44e..f3a72c19c1080ca623e878eea41f657316f9698e 100644 (file)
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -3530,7 +3530,7 @@ void visit_load_ubo(isel_context *ctx, nir_intrinsic_instr *instr)
                            S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
       if (ctx->options->chip_class >= GFX10) {
          desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                      S_008F0C_OOB_SELECT(3) |
+                      S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                       S_008F0C_RESOURCE_LEVEL(1);
       } else {
          desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3633,7 +3633,7 @@ void visit_load_constant(isel_context *ctx, nir_intrinsic_instr *instr)
                         S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
    if (ctx->options->chip_class >= GFX10) {
       desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                   S_008F0C_OOB_SELECT(3) |
+                   S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                    S_008F0C_RESOURCE_LEVEL(1);
    } else {
       desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -5105,7 +5105,7 @@ Temp get_scratch_resource(isel_context *ctx)
 
    if (ctx->program->chip_class >= GFX10) {
       rsrc_conf |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                   S_008F0C_OOB_SELECT(3) |
+                   S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                    S_008F0C_RESOURCE_LEVEL(1);
    } else if (ctx->program->chip_class <= GFX7) { /* dfmt modifies stride on GFX8/GFX9 when ADD_TID_EN=1 */
       rsrc_conf |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/amd/compiler/aco_spill.cpp b/src/amd/compiler/aco_spill.cpp
index 6c38cc31e2b2d158716cd35f1466c0ce948f7206..1c555db79ab605478a5abfbe0f8de3b6519d0a0a 100644 (file)
--- a/src/amd/compiler/aco_spill.cpp
+++ b/src/amd/compiler/aco_spill.cpp
@@ -1291,7 +1291,7 @@ Temp load_scratch_resource(spill_ctx& ctx, Temp& scratch_offset,
 
    if (ctx.program->chip_class >= GFX10) {
       rsrc_conf |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                   S_008F0C_OOB_SELECT(3) |
+                   S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                    S_008F0C_RESOURCE_LEVEL(1);
    } else if (ctx.program->chip_class <= GFX7) { /* dfmt modifies stride on GFX8/GFX9 when ADD_TID_EN=1 */
       rsrc_conf |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/amd/registers/gfx10-rsrc.json b/src/amd/registers/gfx10-rsrc.json
index 1ba413956f68a40e126fba74cd464a6865e88e68..5e8796797403c3e822a710f4c812c11992cd0db7 100644 (file)
--- a/src/amd/registers/gfx10-rsrc.json
+++ b/src/amd/registers/gfx10-rsrc.json
@@ -183,6 +183,14 @@
     {"name": "BC_SWIZZLE_ZYXW", "value": 4},
     {"name": "BC_SWIZZLE_YXWZ", "value": 5}
    ]
+  },
+  "SQ_BUF_RSRC_WORD3__OOB_SELECT": {
+    "entries": [
+    {"name": "OOB_SELECT_STRUCTURED_WITH_OFFSET", "value": 0},
+    {"name": "OOB_SELECT_STRUCTURED", "value": 1},
+    {"name": "OOB_SELECT_DISABLED", "value": 2},
+    {"name": "OOB_SELECT_RAW", "value": 3}
+   ]
   }
  },
  "register_mappings": [
@@ -304,7 +312,7 @@
     {"bits": [21, 22], "name": "INDEX_STRIDE"},
     {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
     {"bits": [24, 24], "comment": "must be 1", "name": "RESOURCE_LEVEL"},
-    {"bits": [28, 29], "name": "OOB_SELECT"},
+    {"bits": [28, 29], "enum_ref": "SQ_BUF_RSRC_WORD3__OOB_SELECT", "name": "OOB_SELECT"},
     {"bits": [30, 31], "comment": "must be 0", "name": "TYPE"}
    ]
   },

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 1a7d59bc0539e89d57d4d98bf33c3a1cd93cafdb..b1d83f26da7c26a8699e061f215e839d0e568f74 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2419,8 +2419,10 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
                                 * - 1: index >= NUM_RECORDS (Structured)
                                 * - 3: offset >= NUM_RECORDS (Raw)
                                 */
+                               int oob_select = stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW;
+
                                desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_UINT) |
-                                          S_008F0C_OOB_SELECT(stride ? 1 : 3) |
+                                          S_008F0C_OOB_SELECT(oob_select) |
                                           S_008F0C_RESOURCE_LEVEL(1);
                        } else {
                                desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) |
@@ -2526,7 +2528,7 @@ radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
 
                        if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
                                desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                          S_008F0C_OOB_SELECT(3) |
+                                          S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                           S_008F0C_RESOURCE_LEVEL(1);
                        } else {
                                desc[3] |= S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
@@ -3500,7 +3502,7 @@ void radv_CmdBindDescriptorSets(
 
                        if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
                                dst[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                         S_008F0C_OOB_SELECT(3) |
+                                         S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                          S_008F0C_RESOURCE_LEVEL(1);
                        } else {
                                dst[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c
index 57dfd2232b9147a962432fdad755301a4e4be2ed..051a51cdbe1239f9cf773c0922564f7dbda2cb84 100644 (file)
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -864,7 +864,7 @@ static void write_buffer_descriptor(struct radv_device *device,
 
        if (device->physical_device->rad_info.chip_class >= GFX10) {
                dst[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                         S_008F0C_OOB_SELECT(3) |
+                         S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                          S_008F0C_RESOURCE_LEVEL(1);
        } else {
                dst[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 978194f4f2ab549b2c21a9bcd704b5ff2360b216..d56125d328e49f490d26a44007fe84010d2f8671 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3033,7 +3033,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(2) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3054,7 +3054,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(2) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3080,7 +3080,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(2) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3103,7 +3103,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(2) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3129,7 +3129,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(3) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3146,7 +3146,7 @@ fill_geom_tess_rings(struct radv_queue *queue,
 
                if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
                        desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(3) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 520d078e4a97a560612e937cce7f8f2e5f9329ba..deb34af3733b746c163a344b1994f0cdd5d2a3c1 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -528,7 +528,7 @@ radv_make_buffer_descriptor(struct radv_device *device,
                 *       else: swizzle_address >= NUM_RECORDS
                 */
                state[3] |= S_008F0C_FORMAT(fmt->img_format) |
-                           S_008F0C_OOB_SELECT(0) |
+                           S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET) |
                            S_008F0C_RESOURCE_LEVEL(1);
        } else {
                num_format = radv_translate_buffer_numformat(desc, first_non_void);

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 581513e3859a80870ce8210fe27ea6c783cfdb95..98f3f4903b49d545128f7ba6706ce3be91973ed9 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -468,7 +468,7 @@ radv_load_resource(struct ac_shader_abi *abi, LLVMValueRef index,
 
                if (ctx->ac.chip_class >= GFX10) {
                        desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                    S_008F0C_OOB_SELECT(3) |
+                                    S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                     S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 76c90a872ea48da9bda70670332150cb7aef80d5..a4cff7d7ccc8da8cdcc9c1e186a23b260e5d6c1d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1174,7 +1174,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
                 *  - 3: offset >= NUM_RECORDS (Raw)
                 */
                if (sctx->chip_class >= GFX10)
-                       rsrc_word3 |= S_008F0C_OOB_SELECT(vb->stride ? 1 : 3);
+                       rsrc_word3 |= S_008F0C_OOB_SELECT(vb->stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW);
 
                desc[0] = va;
                desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
@@ -1272,7 +1272,7 @@ static void si_set_constant_buffer(struct si_context *sctx,
 
                if (sctx->chip_class >= GFX10) {
                        desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(3) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -1364,7 +1364,7 @@ static void si_set_shader_buffer(struct si_context *sctx,
 
        if (sctx->chip_class >= GFX10) {
                desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                          S_008F0C_OOB_SELECT(3) |
+                          S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                           S_008F0C_RESOURCE_LEVEL(1);
        } else {
                desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -1528,7 +1528,7 @@ void si_set_ring_buffer(struct si_context *sctx, uint slot,
 
                if (sctx->chip_class >= GFX10) {
                        desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                  S_008F0C_OOB_SELECT(2) |
+                                  S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                   S_008F0C_RESOURCE_LEVEL(1);
                } else {
                        desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 88b082de45186cbc61b554cece96c945fca111f8..7e57337979ec7f157fd321fbac7e8048356163a0 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1033,7 +1033,7 @@ static LLVMValueRef get_tess_ring_descriptor(struct si_shader_context *ctx,
 
        if (ctx->screen->info.chip_class >= GFX10)
                rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                        S_008F0C_OOB_SELECT(3) |
+                        S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                         S_008F0C_RESOURCE_LEVEL(1);
        else
                rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -2240,7 +2240,7 @@ static LLVMValueRef load_const_buffer_desc_fast_path(struct si_shader_context *c
 
        if (ctx->screen->info.chip_class >= GFX10)
                rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                        S_008F0C_OOB_SELECT(3) |
+                        S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
                         S_008F0C_RESOURCE_LEVEL(1);
        else
                rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -5093,7 +5093,7 @@ static void preload_ring_buffers(struct si_shader_context *ctx)
 
                        if (ctx->ac.chip_class >= GFX10) {
                                rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                        S_008F0C_OOB_SELECT(2) |
+                                        S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) |
                                         S_008F0C_RESOURCE_LEVEL(1);
                        } else {
                                rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b8a2d3504884434b3aa4e34f0c78a7c4a82f1f18..37b618ccb46c9a7d21000b34e38e2582f1e8cf34 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3850,7 +3850,7 @@ si_make_buffer_descriptor(struct si_screen *screen, struct si_resource *buf,
                 *       else: swizzle_address >= NUM_RECORDS
                 */
                state[7] |= S_008F0C_FORMAT(fmt->img_format) |
-                           S_008F0C_OOB_SELECT(0) |
+                           S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET) |
                            S_008F0C_RESOURCE_LEVEL(1);
        } else {
                int first_non_void;