radeonsi: adjust RB+ blend optimization settings
authorMarek Olšák <marek.olsak@amd.com>
Tue, 23 Jul 2019 04:32:06 +0000 (00:32 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 31 Jul 2019 02:06:23 +0000 (22:06 -0400)
based on PAL

src/amd/registers/amdgfxregs.json
src/gallium/drivers/radeonsi/si_state.c

index 23643c3dc7bd98f43ec79adfa0d491e406ff6451..a218232d85be936842830ec91b9818e6d614d818 100644 (file)
     {"name": "EXACT", "value": 0},
     {"name": "11BIT_FORMAT", "value": 1},
     {"name": "10BIT_FORMAT", "value": 3},
-    {"name": "8BIT_FORMAT", "value": 7},
+    {"name": "8BIT_FORMAT", "value": 6},
     {"name": "6BIT_FORMAT", "value": 11},
     {"name": "5BIT_FORMAT", "value": 13},
     {"name": "4BIT_FORMAT", "value": 15}
index 827d6b31db244e215368995017510323ad4ff3ce..be1e88a35b2296301e0bba0b639a760b169f1078 100644 (file)
@@ -250,10 +250,8 @@ static void si_emit_cb_render_state(struct si_context *sctx)
                                break;
 
                        case V_028C70_COLOR_10_11_11:
-                               if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) {
+                               if (spi_format == V_028714_SPI_SHADER_FP16_ABGR)
                                        sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (i * 4);
-                                       sx_blend_opt_epsilon |= V_028758_11BIT_FORMAT << (i * 4);
-                               }
                                break;
 
                        case V_028C70_COLOR_2_10_10_10: