gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flag

always set

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c
index 63182cba2b24f1b9f7dca26d6698ba37ef6c0e6f..54108d1cdfbc70f4c7cf3ce1f000e4ae7540ae85 100644 (file)
--- a/src/gallium/drivers/r300/r300_flush.c
+++ b/src/gallium/drivers/r300/r300_flush.c
@@ -78,8 +78,6 @@ void r300_flush(struct pipe_context *pipe,
 {
     struct r300_context *r300 = r300_context(pipe);
 
-    flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
-
     if (r300->dirty_hw) {
         r300_flush_and_cleanup(r300, flags, fence);
     } else {

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 21565d372ae22abc94dcfb87e5bbd991b2f675de..ea6902f3ee041d3becb11dd585fb4b02be62597f 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -274,9 +274,6 @@ void r600_context_gfx_flush(void *context, unsigned flags,
                radeon_set_context_reg(cs, R_028350_SX_MISC, 0);
        }
 
-       /* force to keep tiling flags */
-       flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
-
        /* Flush the CS. */
        ctx->b.ws->cs_flush(cs, flags, fence);
 

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index a9c9b9ebf3202e5873f2b503bc512a0d13a9566a..ba5693670518f669960841bdc0183cac265da192 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -29,8 +29,7 @@
 #include "pipebuffer/pb_buffer.h"
 
 #define RADEON_FLUSH_ASYNC             (1 << 0)
-#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1)
-#define RADEON_FLUSH_END_OF_FRAME       (1 << 2)
+#define RADEON_FLUSH_END_OF_FRAME       (1 << 1)
 
 /* Tiling flags. */
 enum radeon_bo_layout {

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index f36a7a025d6dc0a729669d1166821dadfeb1edb7..e2e7afd1834dc8b70e3737074a1a0dee02c0dcf6 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -123,9 +123,6 @@ void si_context_gfx_flush(void *context, unsigned flags,
 
        si_emit_cache_flush(ctx, NULL);
 
-       /* force to keep tiling flags */
-       flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
-
        if (ctx->trace_buf)
                si_trace_emit(ctx);
 

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 15c3e5cd0d0401153cbb2a53f1718a75491adcc7..606c38d119d4f98248daa9b932f40c60053a5ca5 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -563,13 +563,10 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
         default:
         case RING_GFX:
         case RING_COMPUTE:
-            cs->cst->flags[0] = 0;
+            cs->cst->flags[0] = RADEON_CS_KEEP_TILING_FLAGS;
             cs->cst->flags[1] = RADEON_CS_RING_GFX;
-            cs->cst->cs.num_chunks = 2;
-            if (flags & RADEON_FLUSH_KEEP_TILING_FLAGS) {
-                cs->cst->flags[0] |= RADEON_CS_KEEP_TILING_FLAGS;
-                cs->cst->cs.num_chunks = 3;
-            }
+            cs->cst->cs.num_chunks = 3;
+
             if (cs->ws->info.has_virtual_memory) {
                 cs->cst->flags[0] |= RADEON_CS_USE_VM;
                 cs->cst->cs.num_chunks = 3;