freedreno/a5xx: fix fragcoord related hangs

Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index 2404389f7e38b89df9e25c5f3f43cba190a0f0af..6ef59c8e42363a0244c95be1096e1dacd3885228 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -455,10 +455,12 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_RING(ring, zsa->rb_depth_cntl);
 
                OUT_PKT4(ring, REG_A5XX_RB_DEPTH_PLANE_CNTL, 1);
-               OUT_RING(ring, COND(fragz, A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z));
+               OUT_RING(ring, COND(fragz, A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z) |
+                               COND(fragz && fp->frag_coord, A5XX_RB_DEPTH_PLANE_CNTL_UNK1));
 
                OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL, 1);
-               OUT_RING(ring, COND(fragz, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z));
+               OUT_RING(ring, COND(fragz, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z) |
+                               COND(fragz && fp->frag_coord, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_UNK1));
        }
 
        if (dirty & FD_DIRTY_RASTERIZER) {

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_program.c b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
index 983d1bca9b6e48d6a63e506073b0fffa202ea01d..3e8c0c83e61137ad39d4d0e2196a0a81eb3f21e9 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_program.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
@@ -539,6 +539,7 @@ fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit)
                OUT_PKT4(ring, REG_A5XX_VPC_CNTL_0, 1);
                OUT_RING(ring, A5XX_VPC_CNTL_0_STRIDE_IN_VPC(l.max_loc) |
                                COND(s[FS].v->total_in > 0, A5XX_VPC_CNTL_0_VARYING) |
+                               COND(s[FS].v->frag_coord, A5XX_VPC_CNTL_0_VARYING) |
                                0x10000);    // XXX
 
                OUT_PKT4(ring, REG_A5XX_PC_PRIMITIVE_CNTL, 1);
@@ -562,6 +563,7 @@ fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit)
 
        OUT_PKT4(ring, REG_A5XX_SP_FS_CTRL_REG0, 1);
        OUT_RING(ring, COND(s[FS].v->total_in > 0, A5XX_SP_FS_CTRL_REG0_VARYING) |
+                       COND(s[FS].v->frag_coord, A5XX_SP_FS_CTRL_REG0_VARYING) |
                        0x4000e | /* XXX set pretty much everywhere */
                        A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(s[FS].i->max_half_reg + 1) |
                        A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) |