nvc0/ir: fix load propagation for sub 4 byte addressing

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6433>

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 727801b9d4b8fdb8ee9629d3a463b8d7d8b9e698..d2255c2cd2bbdeef04892676ea607aff27c5dad7 100644 (file)
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -387,6 +387,12 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
       }
    }
 
       }
    }
 

+   // only loads can do sub 4 byte addressing
+   if (sf == FILE_MEMORY_CONST &&
+       (ld->getSrc(0)->reg.data.offset & 0x3)
+       && i->op != OP_LOAD)
+      return false;
+

    // not all instructions support full 32 bit immediates
    if (sf == FILE_IMMEDIATE) {
       Storage &reg = ld->getSrc(0)->asImm()->reg;
    // not all instructions support full 32 bit immediates
    if (sf == FILE_IMMEDIATE) {
       Storage &reg = ld->getSrc(0)->asImm()->reg;