isl: Add support for multisample compression surfaces

Reviewed-by: Chad Versace <chad.versace@intel.com>

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 8c01d6edb89b46699f7036be1323634098b9e0fa..13882eb2e782de040d1626f0a0841abfd999cd1a 100644 (file)
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -352,6 +352,10 @@ enum isl_format {
 
    /* Formats for color compression surfaces */
    ISL_FORMAT_HIZ,
+   ISL_FORMAT_MCS_2X,
+   ISL_FORMAT_MCS_4X,
+   ISL_FORMAT_MCS_8X,
+   ISL_FORMAT_MCS_16X,
 
    /* Hardware doesn't understand this out-of-band value */
    ISL_FORMAT_UNSUPPORTED =                             UINT16_MAX,
@@ -403,6 +407,7 @@ enum isl_txc {
 
    /* Used for auxiliary surface formats */
    ISL_TXC_HIZ,
+   ISL_TXC_MCS,
 };
 
 /**
@@ -519,6 +524,7 @@ typedef uint64_t isl_surf_usage_flags_t;
 #define ISL_SURF_USAGE_DISPLAY_FLIP_Y_BIT      (1u << 11)
 #define ISL_SURF_USAGE_STORAGE_BIT             (1u << 12)
 #define ISL_SURF_USAGE_HIZ_BIT                 (1u << 13)
+#define ISL_SURF_USAGE_MCS_BIT                 (1u << 14)
 /** @} */
 
 /**
@@ -984,6 +990,7 @@ isl_format_has_bc_compression(enum isl_format fmt)
       return false;
 
    case ISL_TXC_HIZ:
+   case ISL_TXC_MCS:
       unreachable("Should not be called on an aux surface");
    }
 

diff --git a/src/intel/isl/isl_format_layout.csv b/src/intel/isl/isl_format_layout.csv
index 3e681e8a4a48e55586d8c090de1e59768d6008f8..972d50f1009375fcfc79c67bb8902b717c7f57c2 100644 (file)
--- a/src/intel/isl/isl_format_layout.csv
+++ b/src/intel/isl/isl_format_layout.csv
@@ -315,3 +315,7 @@ ASTC_LDR_2D_10X10_FLT16     , 128, 10, 10,  1, sf16, sf16, sf16, sf16,     ,
 ASTC_LDR_2D_12X10_FLT16     , 128, 12, 10,  1, sf16, sf16, sf16, sf16,     ,     ,    , linear,  astc
 ASTC_LDR_2D_12X12_FLT16     , 128, 12, 12,  1, sf16, sf16, sf16, sf16,     ,     ,    , linear,  astc
 HIZ                         , 128,  8,  4,  1,     ,     ,     ,     ,     ,     ,    ,       ,   hiz
+MCS_2X                      ,   8,  1,  1,  1,     ,     ,     ,     ,     ,     ,    ,       ,   mcs
+MCS_4X                      ,   8,  1,  1,  1,     ,     ,     ,     ,     ,     ,    ,       ,   mcs
+MCS_8X                      ,  32,  1,  1,  1,     ,     ,     ,     ,     ,     ,    ,       ,   mcs
+MCS_16X                     ,  64,  1,  1,  1,     ,     ,     ,     ,     ,     ,    ,       ,   mcs

diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
index 1cdb52d3c4eb2b176df173d20a694c2fa8b26e6f..bb0ab38bc196185cfe8bd3af5179c66461b6fb78 100644 (file)
--- a/src/intel/isl/isl_gen7.c
+++ b/src/intel/isl/isl_gen7.c
@@ -238,6 +238,10 @@ gen7_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_HIZ_BIT;
    }
 
+   /* MCS buffers are always Y-tiled */
+   if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS)
+      *flags &= ISL_TILING_Y0_BIT;
+
    if (info->usage & (ISL_SURF_USAGE_DISPLAY_ROTATE_90_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_180_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_270_BIT)) {