radeonsi/gfx9: use the VI codepath for clamping Z

This fixes corrupted shadows in Unigine Valley.
The corruption disappeared when I stopped setting IMG_DATA_FORMAT_24_8
for depth.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index 42f977d7cedf16ea8798d7a4391e38d64529ded6..f8c99ff7e772c154a7d23f5203611f90b66fd410 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -1392,7 +1392,7 @@ static void tex_fetch_args(
                 * It's unnecessary if the original texture format was
                 * Z32_FLOAT, but we don't know that here.
                 */
-               if (ctx->screen->b.chip_class == VI)
+               if (ctx->screen->b.chip_class >= VI)
                        z = ac_build_clamp(&ctx->ac, z);
 
                address[count++] = z;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 11dee499b8797f6bce53295dab4837707edb637e..2c413a4c365262560e0de413c11275a98350115a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3177,14 +3177,13 @@ si_make_texture_descriptor(struct si_screen *screen,
                           uint32_t *fmask_state)
 {
        struct pipe_resource *res = &tex->resource.b.b;
-       const struct util_format_description *base_desc, *desc;
+       const struct util_format_description *desc;
        unsigned char swizzle[4];
        int first_non_void;
        unsigned num_format, data_format, type;
        uint64_t va;
 
        desc = util_format_description(pipe_format);
-       base_desc = util_format_description(res->format);
 
        if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) {
                const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0};
@@ -3285,15 +3284,6 @@ si_make_texture_descriptor(struct si_screen *screen,
                data_format = 0;
        }
 
-       /* Enable clamping for UNORM depth formats promoted to Z32F. */
-       if (screen->b.chip_class >= GFX9 &&
-           util_format_has_depth(desc) &&
-           num_format == V_008F14_IMG_NUM_FORMAT_FLOAT &&
-           util_get_depth_format_type(base_desc) != UTIL_FORMAT_TYPE_FLOAT) {
-               /* NUM_FORMAT=FLOAT and DATA_FORMAT=24_8 means "clamp to [0,1]". */
-               data_format = V_008F14_IMG_DATA_FORMAT_24_8;
-       }
-
        /* S8 with Z32 HTILE needs a special format. */
        if (screen->b.chip_class >= GFX9 &&
            pipe_format == PIPE_FORMAT_S8_UINT &&