i965/l3: Add explicit way size calculation for bxt

There should be no functional change here because Broxton and CHV are
both gt1. Without this code however, it might seem like broxton support
is missing.

While here, put the gt1 check in front to hopefully short-circuit the
condition for the mobile cases.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index 0d99f12216ed1600e3d472048f6cdb0f2f116f7d..0783217e676e81612dc83eb6b3f0dd606e69a254 100644 (file)
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -257,7 +257,9 @@ get_l3_way_size(const struct gen_device_info *devinfo)
    if (devinfo->is_baytrail)
       return 2;
 
-   else if (devinfo->is_cherryview || devinfo->gt == 1)
+   else if (devinfo->gt == 1 ||
+            devinfo->is_cherryview ||
+            devinfo->is_broxton)
       return 4;
 
    else