freedreno: Drop a bunch of duplicated gallium PIPE_CAP default code.
authorEric Anholt <eric@anholt.net>
Sat, 11 Aug 2018 01:15:45 +0000 (18:15 -0700)
committerEric Anholt <eric@anholt.net>
Tue, 4 Sep 2018 15:08:22 +0000 (08:08 -0700)
Now that we have the util function for the default values, we can get rid
of the boilerplate.

v2: Rebase on new gallium caps

Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
src/gallium/drivers/freedreno/freedreno_screen.c

index 3db241a37e2fe773357f15f245414d0c65f18b3f..4e972aea1b0616761571fbe6801a04ae00d978bc 100644 (file)
@@ -210,12 +210,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_COMPUTE:
                return has_compute(screen);
 
-       case PIPE_CAP_SHADER_STENCIL_EXPORT:
-       case PIPE_CAP_TGSI_TEXCOORD:
        case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
-       case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
-       case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
-       case PIPE_CAP_QUERY_MEMORY_INFO:
        case PIPE_CAP_PCI_GROUP:
        case PIPE_CAP_PCI_BUS:
        case PIPE_CAP_PCI_DEVICE:
@@ -248,8 +243,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_POLYGON_OFFSET_CLAMP:
                return is_a5xx(screen) || is_a6xx(screen);
 
-       case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
-               return 0;
        case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
                if (is_a3xx(screen)) return 16;
                if (is_a4xx(screen)) return 32;
@@ -299,86 +292,12 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                        return 4;
                return 0;
 
-       /* Unsupported features. */
-       case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
-       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-       case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
-       case PIPE_CAP_USER_VERTEX_BUFFERS:
-       case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
-       case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
-       case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
-       case PIPE_CAP_TEXTURE_GATHER_SM5:
-       case PIPE_CAP_SAMPLE_SHADING:
-       case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
-       case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
-       case PIPE_CAP_MULTI_DRAW_INDIRECT:
-       case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
-       case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
-       case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
-       case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
-       case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
-       case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
-       case PIPE_CAP_DEPTH_BOUNDS_TEST:
-       case PIPE_CAP_TGSI_TXQS:
        /* TODO if we need this, do it in nir/ir3 backend to avoid breaking precompile: */
        case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
-       case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
-       case PIPE_CAP_CLEAR_TEXTURE:
-       case PIPE_CAP_DRAW_PARAMETERS:
-       case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
-       case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
-       case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
-       case PIPE_CAP_GENERATE_MIPMAP:
-       case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
-       case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
-       case PIPE_CAP_CULL_DISTANCE:
-       case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
-       case PIPE_CAP_TGSI_VOTE:
-       case PIPE_CAP_MAX_WINDOW_RECTANGLES:
-       case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
-       case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
-       case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
-       case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
-       case PIPE_CAP_TGSI_FS_FBFETCH:
-       case PIPE_CAP_TGSI_MUL_ZERO_WINS:
-       case PIPE_CAP_DOUBLES:
-       case PIPE_CAP_INT64:
-       case PIPE_CAP_INT64_DIVMOD:
-       case PIPE_CAP_TGSI_TEX_TXF_LZ:
-       case PIPE_CAP_TGSI_CLOCK:
-       case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
-       case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
-       case PIPE_CAP_TGSI_BALLOT:
-       case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
-       case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
-       case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
-       case PIPE_CAP_POST_DEPTH_COVERAGE:
-       case PIPE_CAP_BINDLESS_TEXTURE:
-       case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
-       case PIPE_CAP_QUERY_SO_OVERFLOW:
-       case PIPE_CAP_MEMOBJ:
-       case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
-       case PIPE_CAP_TILE_RASTER_ORDER:
-       case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
-       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
-       case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
-       case PIPE_CAP_FENCE_SIGNAL:
-       case PIPE_CAP_CONSTBUF0_FLAGS:
-       case PIPE_CAP_PACKED_UNIFORMS:
-       case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
-       case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
-       case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
-       case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
-       case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
-       case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
-       case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
                return 0;
 
-       case PIPE_CAP_MAX_GS_INVOCATIONS:
-               return 32;
-
-       case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
-                return 1 << 27;
+       case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
+               return 0;
 
        case PIPE_CAP_CONTEXT_PRIORITY_MASK:
                return screen->priority_mask;
@@ -427,15 +346,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                        return 16 * 4;   /* should only be shader out limit? */
                return 0;
 
-       /* Geometry shader output, unsupported. */
-       case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
-       case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
-       case PIPE_CAP_MAX_VERTEX_STREAMS:
-               return 0;
-
-       case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
-               return 2048;
-
        /* Texturing. */
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
@@ -453,8 +363,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                return is_a3xx(screen) ? 1 : 0;
 
        /* Queries. */
-       case PIPE_CAP_QUERY_BUFFER_OBJECT:
-               return 0;
        case PIPE_CAP_OCCLUSION_QUERY:
                return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen);
        case PIPE_CAP_QUERY_TIMESTAMP:
@@ -462,20 +370,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                /* only a4xx, requires new enough kernel so we know max_freq: */
                return (screen->max_freq > 0) && (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen));
 
-       case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
-       case PIPE_CAP_MIN_TEXEL_OFFSET:
-               return -8;
-
-       case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
-       case PIPE_CAP_MAX_TEXEL_OFFSET:
-               return 7;
-
-       case PIPE_CAP_ENDIANNESS:
-               return PIPE_ENDIAN_LITTLE;
-
-       case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
-               return 64;
-
        case PIPE_CAP_VENDOR_ID:
                return 0x5143;
        case PIPE_CAP_DEVICE_ID: