ac/nir: set number of channels for packed mrt exports

Bit 0 enables VSRC0 (R in low bits, G high) and bit 2 enables
VSRC1 (B in low bits, A high).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9b8506986083f05bfc5855b51418e29a9f4bac1b..b8cfdc3c1a47f3e73ba71665fd2d6355182d0cf8 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5910,22 +5910,27 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
                        break;
 
                case V_028714_SPI_SHADER_FP16_ABGR:
+                       args->enabled_channels = 0x5;
                        packf = ac_build_cvt_pkrtz_f16;
                        break;
 
                case V_028714_SPI_SHADER_UNORM16_ABGR:
+                       args->enabled_channels = 0x5;
                        packf = ac_build_cvt_pknorm_u16;
                        break;
 
                case V_028714_SPI_SHADER_SNORM16_ABGR:
+                       args->enabled_channels = 0x5;
                        packf = ac_build_cvt_pknorm_i16;
                        break;
 
                case V_028714_SPI_SHADER_UINT16_ABGR:
+                       args->enabled_channels = 0x5;
                        packi = ac_build_cvt_pk_u16;
                        break;
 
                case V_028714_SPI_SHADER_SINT16_ABGR:
+                       args->enabled_channels = 0x5;
                        packi = ac_build_cvt_pk_i16;
                        break;