radeonsi: enable DCC with MSAA for VI

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index ce612113c51d2e93ad1a940d510d0a0dd183ff30..d7927aa3f3473cbedc331f354c78362d92864c77 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -629,6 +629,8 @@ static const struct debug_named_value common_debug_options[] = {
        { "mono", DBG(MONOLITHIC_SHADERS), "Use old-style monolithic shaders compiled on demand" },
        { "unsafemath", DBG(UNSAFE_MATH), "Enable unsafe math shader optimizations" },
        { "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main framebuffer" },
+       { "nodccmsaa", DBG(NO_DCC_MSAA), "Disable DCC for MSAA" },
+       { "dccmsaa", DBG(DCC_MSAA), "Enable DCC for MSAA" },
        { "nodpbb", DBG(NO_DPBB), "Disable DPBB." },
        { "nodfsm", DBG(NO_DFSM), "Disable DFSM." },
        { "dpbb", DBG(DPBB), "Enable DPBB." },

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index adfcc7c8a70a20715966fbe48d3b1750f4f59d95..2ece4095c4a89bfc899c54bcbbb9f167ce8e1198 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -119,6 +119,8 @@ enum {
        DBG_NO_DCC,
        DBG_NO_DCC_CLEAR,
        DBG_NO_DCC_FB,
+       DBG_NO_DCC_MSAA,
+       DBG_DCC_MSAA,
 
        /* Tests: */
        DBG_TEST_DMA,
@@ -393,6 +395,7 @@ struct r600_common_screen {
        uint64_t                        debug_flags;
        bool                            has_rbplus;     /* if RB+ registers exist */
        bool                            rbplus_allowed; /* if RB+ is allowed */
+       bool                            dcc_msaa_allowed;
 
        struct disk_cache               *disk_shader_cache;
 

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 139f735cf86c49052dbf84ef4ed68993ea805a3f..e3658b465ae191dcb21c0c002441ebec0a595883 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -267,7 +267,9 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
        if (rscreen->chip_class >= VI &&
            (ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC ||
             ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT ||
-            ptex->nr_samples >= 2))
+            /* DCC MSAA array textures are disallowed due to incomplete clear impl. */
+            (ptex->nr_samples >= 2 &&
+             (!rscreen->dcc_msaa_allowed || ptex->array_size > 1))))
                flags |= RADEON_SURF_DISABLE_DCC;
 
        if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index b3d8ae508bd59aa0d8827b20ff4a60fb9ff90d32..6e433a3170826d0edfadd667f6e98da8631ba8dc 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1127,6 +1127,11 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
                         sscreen->b.family == CHIP_RAVEN);
        }
 
+       sscreen->b.dcc_msaa_allowed =
+               !(sscreen->b.debug_flags & DBG(NO_DCC_MSAA)) &&
+               (sscreen->b.debug_flags & DBG(DCC_MSAA) ||
+                sscreen->b.chip_class == VI);
+
        (void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);
        sscreen->use_monolithic_shaders =
                (sscreen->b.debug_flags & DBG(MONOLITHIC_SHADERS)) != 0;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 4eee7787c6fee836b538abd230be3d5a61fe91a2..d59b363f3080cdf27f006de0db3b335169e32c31 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -676,7 +676,8 @@ static void si_bind_blend_state(struct pipe_context *ctx, void *state)
            old_blend->cb_target_mask != blend->cb_target_mask ||
            old_blend->dual_src_blend != blend->dual_src_blend ||
            (old_blend->blend_enable_4bit != blend->blend_enable_4bit &&
-            sctx->framebuffer.nr_samples >= 2))
+            sctx->framebuffer.nr_samples >= 2 &&
+            sctx->screen->b.dcc_msaa_allowed))
                si_mark_atom_dirty(sctx, &sctx->cb_render_state);
 
        if (!old_blend ||