freedreno/a4xx: rasterizer_discard support

This one is slightly annoying, since trying to write RBRC from draw
would clobber values set in the tiling/gmem code.  We could do command-
stream patching for RBRC, as is done on a3xx.  Although since it seems
to be a rarely used feature, it is easier just to do RMW to set/clear
the bit.

Fixes dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_triangles
and related tests.

a3xx still needs the same feature, although there it probably makes more
sense to take advantage of the existing cmdstream patching which is
required for RBRC for other reasons.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index c34f9441c7b853d0bc8b728fe2451926e5a76ba7..e874d223187549601ab5c8ea8dd7651effaa9430 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -157,7 +157,24 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
        emit.dirty = dirty;
        emit.vp = NULL;   /* we changed key so need to refetch vp */
        emit.fp = NULL;
+
+       if (ctx->rasterizer->rasterizer_discard) {
+               fd_wfi(ctx, ctx->ring);
+               OUT_PKT3(ctx->ring, CP_REG_RMW, 3);
+               OUT_RING(ctx->ring, REG_A4XX_RB_RENDER_CONTROL);
+               OUT_RING(ctx->ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE);
+               OUT_RING(ctx->ring, A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE);
+       }
+
        draw_impl(ctx, ctx->ring, &emit);
+
+       if (ctx->rasterizer->rasterizer_discard) {
+               fd_wfi(ctx, ctx->ring);
+               OUT_PKT3(ctx->ring, CP_REG_RMW, 3);
+               OUT_RING(ctx->ring, REG_A4XX_RB_RENDER_CONTROL);
+               OUT_RING(ctx->ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE);
+               OUT_RING(ctx->ring, 0);
+       }
 }
 
 /* clear operations ignore viewport state, so we need to reset it