radeonsi: limit DPBB context_states_per_bin batches when using gfx9 workaround

It seems that using 'context_states_per_bin = 1' for DPBB fixes the reported issue.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110214

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 157a38f88a0f1e954b24c7bd5b2ca69e11134cc8..a361ea253c32e20e332455c4fa2da5701befeaf7 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -563,7 +563,11 @@ void si_emit_dpbb_state(struct si_context *sctx)
                context_states_per_bin = 1;
                persistent_states_per_bin = 1;
        } else {
-               context_states_per_bin = 6;
+               /* This is a workaround for:
+                *    https://bugs.freedesktop.org/show_bug.cgi?id=110214
+                * (an alternative is to insert manual BATCH_BREAK event when
+                * a context_roll is detected). */
+               context_states_per_bin = sctx->screen->has_gfx9_scissor_bug ? 1 : 6;
                /* Using 32 here can cause GPU hangs on RAVEN1 */
                persistent_states_per_bin = 16;
        }