radv: remove wrong assert that checks compute subgroup size
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 18 Mar 2020 14:03:45 +0000 (15:03 +0100)
committerMarge Bot <eric+marge@anholt.net>
Wed, 18 Mar 2020 21:31:47 +0000 (21:31 +0000)
Ooops. For some reasons, I have been confused with Wave32 on GFX10,
but it's still possible to require a specific subgroup size if
only Wave64 is supported.

Fixes: 672d1061998 ("radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>

src/amd/vulkan/radv_pipeline.c

index ef88dfe9468127da496a3ebd194457ea3a03834a..01db4c93e17405bce8017563c32ab731b4ca5721 100644 (file)
@@ -2812,11 +2812,10 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                radv_start_feedback(stage_feedbacks[i]);
 
                if (key->compute_subgroup_size) {
-                       /* Only GFX10+ and compute shaders currently support
-                        * requiring a specific subgroup size.
-                        */
-                       assert(device->physical_device->rad_info.chip_class >= GFX10 &&
-                              i == MESA_SHADER_COMPUTE);
+                       /* Only compute shaders currently support requiring a
+                        * specific subgroup size.
+                         */
+                       assert(i == MESA_SHADER_COMPUTE);
                        subgroup_size = key->compute_subgroup_size;
                        ballot_bit_size = key->compute_subgroup_size;
                }