radeon/r600: Fix remaining warnings when building 64 bit binary.
authorPauli Nieminen <suokkos@gmail.com>
Tue, 25 Aug 2009 18:46:32 +0000 (21:46 +0300)
committerPauli Nieminen <suokkos@gmail.com>
Tue, 25 Aug 2009 19:16:19 +0000 (22:16 +0300)
src/mesa/drivers/dri/r600/r600_cmdbuf.c
src/mesa/drivers/dri/r600/r700_assembler.c
src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
src/mesa/drivers/dri/radeon/radeon_dma.c

index a330d5b151cefd187367c1715d246f38b3a1991e..050d7bc6d0ed9e01fb2f914546945c3440a8eb83 100644 (file)
@@ -304,6 +304,7 @@ static int r600_cs_set_age(struct radeon_cs *cs) /* -------------- */
     return 0;
 }
 
+#if 0
 static void dump_cmdbuf(struct radeon_cs *cs)
 {
        int i;
@@ -314,6 +315,7 @@ static void dump_cmdbuf(struct radeon_cs *cs)
        fprintf(stderr,"--end--\n");
 
 }
+#endif
 
 static int r600_cs_emit(struct radeon_cs *cs)
 {
index eaacd0611372f7976c380ee06246060eb71fdf33..834c23593b42cdefdad5535029cbdeaba3d845ed 100644 (file)
@@ -2132,7 +2132,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
                         alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writew; 
                         break;
                     default: 
-                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = SQ_SEL_MASK; 
+                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1; //SQ_SEL_MASK;
                         break;
                 }            
                 alu_instruction_ptr->m_Word1_OP2.f6.omod               = SQ_ALU_OMOD_OFF;
@@ -2161,7 +2161,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
                         alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writew; 
                         break;
                     default: 
-                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = SQ_SEL_MASK; 
+                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = 1; //SQ_SEL_MASK;
                         break;
                 }            
                 alu_instruction_ptr->m_Word1_OP2.f.omod               = SQ_ALU_OMOD_OFF;
index 410df4d665c96597371c63f39bb54e00a21b1731..6fcd1ce7ca628328d8842f23b6cae5c18f82084b 100644 (file)
@@ -54,11 +54,12 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
  */
 #define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags)       \
        do {                                                    \
-        if (0 && offset) {                                     \
+       int  __offset = (offset);                               \
+        if (0 && __offset) {                                   \
             fprintf(stderr, "(%s:%s:%d) offset : %d\n",                \
-            __FILE__, __FUNCTION__, __LINE__, offset);         \
+            __FILE__, __FUNCTION__, __LINE__, __offset);       \
         }                                                      \
-        radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, offset);   \
+        radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, __offset); \
         radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs,            \
                               bo, rd, wd, flags);              \
        if (!b_l_rmesa->radeonScreen->kernel_mm)                \
index f15013c33b149bbf407e679ef8a2d7afa7d343b4..51f764cf47336540230d90b052edf1c142526a7d 100644 (file)
@@ -333,7 +333,7 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
                foreach(dma_bo, &rmesa->dma.reserved)
                        ++reserved;
 
-               fprintf(stderr, "%s: free %u, wait %u, reserved %u, minimum_size: %u\n", 
+               fprintf(stderr, "%s: free %zu, wait %zu, reserved %zu, minimum_size: %zu\n",
                      __FUNCTION__, free, wait, reserved, rmesa->dma.minimum_size);
        }