radeonsi: remove r600_pipe_common::screen

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 81bf3865ed9f5c28866245a8621b82f42c924ca5..792f2827ee6cdb32c6c38d2f182f661a80ccae95 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -300,7 +300,6 @@ struct radeon_saved_cs {
 struct r600_common_context {
        struct pipe_context b; /* base class */
 
-       struct si_screen                *screen;
        struct radeon_winsys            *ws;
        struct radeon_winsys_ctx        *ctx;
        enum radeon_family              family;

diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index 414cb23663dfe7f95f9e2e533a46ba651d1dee56..f2c32e1484e3357411d29c9200e2f8f11d83da48 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -553,7 +553,7 @@ static void si_dump_bo_list(struct si_context *sctx,
 
        for (i = 0; i < saved->bo_count; i++) {
                /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
-               const unsigned page_size = sctx->b.screen->info.gart_page_size;
+               const unsigned page_size = sctx->screen->info.gart_page_size;
                uint64_t va = saved->bo_list[i].vm_address;
                uint64_t size = saved->bo_list[i].bo_size;
                bool hit = false;
@@ -599,14 +599,14 @@ static void si_dump_framebuffer(struct si_context *sctx, struct u_log_context *l
 
                rtex = (struct r600_texture*)state->cbufs[i]->texture;
                u_log_printf(log, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
-               si_print_texture_info(sctx->b.screen, rtex, log);
+               si_print_texture_info(sctx->screen, rtex, log);
                u_log_printf(log, "\n");
        }
 
        if (state->zsbuf) {
                rtex = (struct r600_texture*)state->zsbuf->texture;
                u_log_printf(log, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
-               si_print_texture_info(sctx->b.screen, rtex, log);
+               si_print_texture_info(sctx->screen, rtex, log);
                u_log_printf(log, "\n");
        }
 }

diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index e43560ab033a866eeb3654de22c261450e18b0ab..7aa7b1c4a32bdb3beabc4ddcbd5b5a89eebcc10c 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -95,7 +95,7 @@ void si_gfx_write_event_eop(struct si_context *ctx,
                    query_type != PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE) {
                        struct r600_resource *scratch = ctx->b.eop_bug_scratch;
 
-                       assert(16 * ctx->b.screen->info.num_render_backends <=
+                       assert(16 * ctx->screen->info.num_render_backends <=
                               scratch->b.b.width0);
                        radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
                        radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));

diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 4450cb6d7765e198e9c88307b719eee80d748347..b607becd3f6b5c896b895856b61dc45681662793 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -43,7 +43,7 @@ void si_need_gfx_cs_space(struct si_context *ctx)
         * that have been added (cs_add_buffer) and two counters in the pipe
         * driver for those that haven't been added yet.
         */
-       if (unlikely(!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx_cs,
+       if (unlikely(!radeon_cs_memory_below_limit(ctx->screen, ctx->b.gfx_cs,
                                                   ctx->b.vram, ctx->b.gtt))) {
                ctx->b.gtt = 0;
                ctx->b.vram = 0;
@@ -107,7 +107,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
                        SI_CONTEXT_PS_PARTIAL_FLUSH;
 
        /* DRM 3.1.0 doesn't flush TC for VI correctly. */
-       if (ctx->b.chip_class == VI && ctx->b.screen->info.drm_minor <= 1)
+       if (ctx->b.chip_class == VI && ctx->screen->info.drm_minor <= 1)
                ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 |
                                SI_CONTEXT_INV_VMEM_L1;
 

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 588e925547297662f8b681ee22c687479c1e1385..43afcf318ddef2529b91bcbc4e1f7883b1c0d8e3 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -348,7 +348,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
        slab_create_child(&sctx->b.pool_transfers, &sscreen->pool_transfers);
        slab_create_child(&sctx->b.pool_transfers_unsync, &sscreen->pool_transfers);
 
-       sctx->b.screen = sscreen;
        sctx->b.ws = sscreen->ws;
        sctx->b.family = sscreen->info.family;
        sctx->b.chip_class = sscreen->info.chip_class;

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index f0db029e220235e6afa4a7907492aaa618909f6b..ee9133ba017d3ace6246a328f1b5511cdb7c476f 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -104,7 +104,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
                sctx->tcs_shader.cso ? sctx->tcs_shader.cso : sctx->tes_shader.cso;
        unsigned tess_uses_primid = sctx->ia_multi_vgt_param_key.u.tess_uses_prim_id;
        bool has_primid_instancing_bug = sctx->b.chip_class == SI &&
-                                        sctx->b.screen->info.max_se == 1;
+                                        sctx->screen->info.max_se == 1;
        unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL];
        unsigned num_tcs_input_cp = info->vertices_per_patch;
        unsigned num_tcs_output_cp, num_tcs_inputs, num_tcs_outputs;
@@ -1249,7 +1249,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
        }
 
        /* Recompute and re-emit the texture resource states if needed. */
-       dirty_tex_counter = p_atomic_read(&sctx->b.screen->dirty_tex_counter);
+       dirty_tex_counter = p_atomic_read(&sctx->screen->dirty_tex_counter);
        if (unlikely(dirty_tex_counter != sctx->b.last_dirty_tex_counter)) {
                sctx->b.last_dirty_tex_counter = dirty_tex_counter;
                sctx->framebuffer.dirty_cbufs |=