radeonsi/gfx10: implement si_set_{constant,shader}_buffer
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Tue, 14 Nov 2017 15:55:34 +0000 (16:55 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 3 Jul 2019 19:51:12 +0000 (15:51 -0400)
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/gallium/drivers/radeonsi/si_descriptors.c

index 91bfcf724d1b919b0180f0a70fc8f281065da179..b6be087b8718f19b8979be2c1a7b3da25bd9a3cc 100644 (file)
@@ -1259,9 +1259,16 @@ static void si_set_constant_buffer(struct si_context *sctx,
                desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
                          S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
                          S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-                         S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
-                         S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
-                         S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+                         S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
+
+               if (sctx->chip_class >= GFX10) {
+                       desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+                                  S_008F0C_OOB_SELECT(3) |
+                                  S_008F0C_RESOURCE_LEVEL(1);
+               } else {
+                       desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
+                                  S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+               }
 
                buffers->buffers[slot] = buffer;
                buffers->offsets[slot] = buffer_offset;
@@ -1344,9 +1351,16 @@ static void si_set_shader_buffer(struct si_context *sctx,
        desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
                  S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
                  S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-                 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
-                 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
-                 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+                 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
+
+       if (sctx->chip_class >= GFX10) {
+               desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+                          S_008F0C_OOB_SELECT(3) |
+                          S_008F0C_RESOURCE_LEVEL(1);
+       } else {
+               desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
+                          S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+       }
 
        pipe_resource_reference(&buffers->buffers[slot], &buf->b.b);
        buffers->offsets[slot] = sbuffer->buffer_offset;