gallium: add TGSI_PROPERTY_VS_BLIT_SGPRS_AMD for tgsi_to_nir
authorMarek Olšák <marek.olsak@amd.com>
Wed, 31 Jul 2019 20:45:21 +0000 (16:45 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Mon, 12 Aug 2019 18:52:17 +0000 (14:52 -0400)
needed by radeonsi NIR support

src/gallium/auxiliary/tgsi/tgsi_strings.c
src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
src/gallium/drivers/radeonsi/si_shader.c
src/gallium/drivers/radeonsi/si_shader.h
src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c
src/gallium/drivers/radeonsi/si_state_shaders.c
src/gallium/include/pipe/p_shader_tokens.h

index 887d2271dc14673ea0ecd6423022b77d8772e2be..b997b53fa6e79f387f9c3916234d36a4e1db5813 100644 (file)
@@ -159,6 +159,7 @@ const char *tgsi_property_names[TGSI_PROPERTY_COUNT] =
    "CS_FIXED_BLOCK_HEIGHT",
    "CS_FIXED_BLOCK_DEPTH",
    "MUL_ZERO_WINS",
+   "VS_BLIT_SGPRS_AMD",
 };
 
 const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =
index 27be0661006b9e999ca1d6cd8e020731113583fb..6c9231fe533db8ce60a798e355b1e71992f3bbee 100644 (file)
@@ -600,7 +600,7 @@ void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
        LLVMValueRef num_vertices_val;
 
        if (ctx->type == PIPE_SHADER_VERTEX) {
-               if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+               if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
                        /* Blits always use axis-aligned rectangles with 3 vertices. */
                        num_vertices = 3;
                        num_vertices_val = LLVMConstInt(ctx->i32, 3, 0);
@@ -689,7 +689,7 @@ void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
 
        /* Update query buffer */
        /* TODO: this won't catch 96-bit clear_buffer via transform feedback. */
-       if (!info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+       if (!info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
                tmp = si_unpack_param(ctx, ctx->param_vs_state_bits, 6, 1);
                tmp = LLVMBuildTrunc(builder, tmp, ctx->i1, "");
                ac_build_ifcc(&ctx->ac, tmp, 5029); /* if (STREAMOUT_QUERY_ENABLED) */
index 8dd608b53788bc0c949adaaa62a09f98b790565a..e191a4a9631dd3a5537cc10a56e568d86c4fd9d4 100644 (file)
@@ -442,7 +442,7 @@ void si_llvm_load_input_vs(
        LLVMValueRef out[4])
 {
        const struct tgsi_shader_info *info = &ctx->shader->selector->info;
-       unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+       unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
 
        if (vs_blit_property) {
                LLVMValueRef vertex_id = ctx->abi.vertex_id;
@@ -4662,7 +4662,7 @@ static void create_function(struct si_shader_context *ctx)
        unsigned num_prolog_vgprs = 0;
        unsigned type = ctx->type;
        unsigned vs_blit_property =
-               shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+               shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
 
        si_init_function_info(&fninfo);
 
index 3ce3d4e824a280f083ba005b10f150ecc859b9dc..c942bd20ee7e8fee95db91b536a2c4a8866cc7ee 100644 (file)
@@ -273,9 +273,6 @@ enum {
        /* The number of used user data dwords in the range [1, 4]. */
        TGSI_PROPERTY_CS_USER_DATA_DWORDS = TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
 
-       /* Use a property enum that VS wouldn't use. */
-       TGSI_PROPERTY_VS_BLIT_SGPRS = TGSI_PROPERTY_FS_COORD_ORIGIN,
-
        /* These represent the number of SGPRs the shader uses. */
        SI_VS_BLIT_SGPRS_POS = 3,
        SI_VS_BLIT_SGPRS_POS_COLOR = 7,
index 15bb475d89a5331bb2c24503843a8d526cf468c6..fcd885c080f278cfa5aea6c46d3c9fb10666b3a8 100644 (file)
@@ -61,7 +61,7 @@ void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
                return NULL;
 
        /* Tell the shader to load VS inputs from SGPRs: */
-       ureg_property(ureg, TGSI_PROPERTY_VS_BLIT_SGPRS, vs_blit_property);
+       ureg_property(ureg, TGSI_PROPERTY_VS_BLIT_SGPRS_AMD, vs_blit_property);
        ureg_property(ureg, TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, true);
 
        /* This is just a pass-through shader with 1-3 MOV instructions. */
index 18cdc989cf823e0cf6746473d151c502d87a711a..2ee069b90e06c21cda4f00448bd5b213da470b90 100644 (file)
@@ -1108,9 +1108,9 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader
                /* VGPR5-8: (VertexID, UserVGPR0, UserVGPR1, UserVGPR2 / InstanceID) */
                es_vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0;
 
-               if (es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+               if (es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
                        num_user_sgprs = SI_SGPR_VS_BLIT_DATA +
-                                        es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+                                        es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
                } else {
                        num_user_sgprs = si_get_num_vs_user_sgprs(GFX9_VSGS_NUM_USER_SGPR);
                }
@@ -1365,9 +1365,9 @@ static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader,
                        vgpr_comp_cnt = enable_prim_id ? 2 : (shader->info.uses_instanceid ? 1 : 0);
                }
 
-               if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+               if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
                        num_user_sgprs = SI_SGPR_VS_BLIT_DATA +
-                                        info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+                                        info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
                } else {
                        num_user_sgprs = si_get_num_vs_user_sgprs(SI_VS_NUM_USER_SGPR);
                }
@@ -1703,7 +1703,7 @@ void si_shader_selector_key_vs(struct si_context *sctx,
                               struct si_vs_prolog_bits *prolog_key)
 {
        if (!sctx->vertex_elements ||
-           vs->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS])
+           vs->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD])
                return;
 
        struct si_vertex_elements *elts = sctx->vertex_elements;
@@ -2680,7 +2680,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
        /* The prolog is a no-op if there are no inputs. */
        sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
                               sel->info.num_inputs &&
-                              !sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+                              !sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
 
        sel->force_correct_derivs_after_kill =
                sel->type == PIPE_SHADER_FRAGMENT &&
@@ -2972,7 +2972,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
 
        sctx->vs_shader.cso = sel;
        sctx->vs_shader.current = sel ? sel->first_variant : NULL;
-       sctx->num_vs_blit_sgprs = sel ? sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS] : 0;
+       sctx->num_vs_blit_sgprs = sel ? sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD] : 0;
 
        si_update_common_shader_state(sctx);
        si_update_vs_viewport_state(sctx);
index e708f68745fb7c99bfe7ba1f05b0c8174bacd269..0c5ee580fb0b0c7958e965930cfc08d267b43ff7 100644 (file)
@@ -301,6 +301,7 @@ enum tgsi_property_name {
    TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
    TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
    TGSI_PROPERTY_MUL_ZERO_WINS,
+   TGSI_PROPERTY_VS_BLIT_SGPRS_AMD,
    TGSI_PROPERTY_COUNT,
 };