radv: disable CPU caching for the upload BO to reduce fetch latency

AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4b14e1ed0af808f97c8e84681d59e04a738e0152..4130a62d3f9781d27b0e71e0573a172561b274de 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -483,7 +483,8 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer,
                                       RADEON_DOMAIN_GTT,
                                       RADEON_FLAG_CPU_ACCESS|
                                       RADEON_FLAG_NO_INTERPROCESS_SHARING |
-                                      RADEON_FLAG_32BIT,
+                                      RADEON_FLAG_32BIT |
+                                      RADEON_FLAG_GTT_WC,
                                       RADV_BO_PRIORITY_UPLOAD_BUFFER);
 
        if (!bo) {