radeonsi: fix num banks selection on SI for dma setup (v2)

The number of banks varies based on the tile mode index
just like CIK.

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=77533

v2: fix ordering for nbanks calculation for consistency

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index afe8a3ad1d5fcf04901b349b7b6cadb35ba7ce35..97ea08b8f8f791c6410fc1e69f74011b78b7715a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -45,21 +45,6 @@ static unsigned si_array_mode(unsigned mode)
        }
 }
 
-static uint32_t si_num_banks(uint32_t nbanks)
-{
-       switch (nbanks) {
-       case 2:
-               return V_009910_ADDR_SURF_2_BANK;
-       case 4:
-               return V_009910_ADDR_SURF_4_BANK;
-       case 8:
-       default:
-               return V_009910_ADDR_SURF_8_BANK;
-       case 16:
-               return V_009910_ADDR_SURF_16_BANK;
-       }
-}
-
 static uint32_t si_micro_tile_mode(struct si_screen *sscreen, unsigned tile_mode)
 {
        if (sscreen->b.info.si_tile_mode_array_valid) {
@@ -161,7 +146,6 @@ static void si_dma_copy_tile(struct si_context *ctx,
        sub_cmd = SI_DMA_COPY_TILED;
        lbpp = util_logbase2(bpp);
        pitch_tile_max = ((pitch / bpp) / 8) - 1;
-       nbanks = si_num_banks(ctx->screen->b.tiling_info.num_banks);
 
        if (dst_mode == RADEON_SURF_MODE_LINEAR) {
                /* T2L */
@@ -185,6 +169,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
                bank_h = cik_bank_wh(rsrc->surface.bankh);
                bank_w = cik_bank_wh(rsrc->surface.bankw);
                mt_aspect = cik_macro_tile_aspect(rsrc->surface.mtilea);
+               nbanks = cik_num_banks(sscreen, rsrc->surface.bpe, rsrc->surface.tile_split);
                tile_split = cik_tile_split(rsrc->surface.tile_split);
                tile_mode_index = si_tile_mode_index(rsrc, src_level,
                                                     util_format_has_stencil(util_format_description(src->format)));
@@ -212,6 +197,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
                bank_h = cik_bank_wh(rdst->surface.bankh);
                bank_w = cik_bank_wh(rdst->surface.bankw);
                mt_aspect = cik_macro_tile_aspect(rdst->surface.mtilea);
+               nbanks = cik_num_banks(sscreen, rdst->surface.bpe, rdst->surface.tile_split);
                tile_split = cik_tile_split(rdst->surface.tile_split);
                tile_mode_index = si_tile_mode_index(rdst, dst_level,
                                                     util_format_has_stencil(util_format_description(dst->format)));

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index ab9c4cc28342fa610b37f827be2908b6625a8a80..211a6152e0c983d9ca553fa51493bd1659f588ab 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -47,23 +47,31 @@ static void si_init_atom(struct r600_atom *atom, struct r600_atom **list_elem,
        *list_elem = atom;
 }
 
-static uint32_t cik_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split)
+uint32_t cik_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split)
 {
-       if (sscreen->b.info.cik_macrotile_mode_array_valid) {
-               unsigned index, tileb;
+       unsigned index, tileb;
 
-               tileb = 8 * 8 * bpe;
-               tileb = MIN2(tile_split, tileb);
+       tileb = 8 * 8 * bpe;
+       tileb = MIN2(tile_split, tileb);
 
-               for (index = 0; tileb > 64; index++) {
-                       tileb >>= 1;
-               }
+       for (index = 0; tileb > 64; index++) {
+               tileb >>= 1;
+       }
 
+       if ((sscreen->b.chip_class == CIK) &&
+           sscreen->b.info.cik_macrotile_mode_array_valid) {
                assert(index < 16);
 
                return (sscreen->b.info.cik_macrotile_mode_array[index] >> 6) & 0x3;
        }
 
+       if ((sscreen->b.chip_class == SI) &&
+           sscreen->b.info.si_tile_mode_array_valid) {
+               assert(index < 16);
+
+               return (sscreen->b.info.si_tile_mode_array[index] >> 20) & 0x3;
+       }
+
        /* The old way. */
        switch (sscreen->b.tiling_info.num_banks) {
        case 2:

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index c0806008e2f09ec57fc4f9b0fb0713f3b21cf630..0f37cd971620e92c62e1794fd8534ecaf6eac1b4 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -233,6 +233,7 @@ unsigned cik_bank_wh(unsigned bankwh);
 unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode);
 unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect);
 unsigned cik_tile_split(unsigned tile_split);
+uint32_t cik_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split);
 unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil);
 
 /* si_state_draw.c */