radeonsi: initialize displayable DCC using the retile blit to prevent hangs
authorMarek Olšák <marek.olsak@amd.com>
Tue, 17 Sep 2019 02:31:48 +0000 (22:31 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 24 Sep 2019 23:23:30 +0000 (19:23 -0400)
Cc 19.2 <mesa-stable@lists.freedesktop.org>

src/gallium/drivers/radeonsi/si_texture.c

index 5f4fd60b09f98cf548075eea7887201e2938d396..a8504f4e90c63e56f2de0f63f0d481505e9e337c 100644 (file)
@@ -1448,9 +1448,17 @@ si_texture_create_object(struct pipe_screen *screen,
                        }
                }
 
-               /* Upload the DCC retile map. */
+               /* Initialize displayable DCC that requires the retile blit. */
                if (tex->surface.dcc_retile_map_offset) {
-                       /* Use a staging buffer for the upload, because
+                       /* Uninitialized DCC can hang the display hw.
+                        * Clear to white to indicate that. */
+                       si_screen_clear_buffer(sscreen, &tex->buffer.b.b,
+                                              tex->surface.display_dcc_offset,
+                                              tex->surface.u.gfx9.display_dcc_size,
+                                              DCC_CLEAR_COLOR_1111);
+
+                       /* Upload the DCC retile map.
+                        * Use a staging buffer for the upload, because
                         * the buffer backing the texture is unmappable.
                         */
                        bool use_uint16 = tex->surface.u.gfx9.dcc_retile_use_uint16;