intel: add a couple of ASSERTED
authorEric Engestrom <eric.engestrom@intel.com>
Sat, 22 Jun 2019 18:37:53 +0000 (19:37 +0100)
committerEric Engestrom <eric.engestrom@intel.com>
Wed, 31 Jul 2019 08:41:05 +0000 (09:41 +0100)
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/vulkan/anv_nir_apply_pipeline_layout.c
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_state_upload.c

index 94ec56252ba2de8803a796ebb4d51a2f1d044fbe..f9a281b701902b1fe7530b2cfa3b19d7b63d5b33 100644 (file)
@@ -732,7 +732,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
    nir_builder *b = &state->builder;
    b->cursor = nir_before_instr(&intrin->instr);
 
-   const bool use_bindless = state->pdevice->has_bindless_images;
+   ASSERTED const bool use_bindless = state->pdevice->has_bindless_images;
 
    if (intrin->intrinsic == nir_intrinsic_image_deref_load_param_intel) {
       b->cursor = nir_instr_remove(&intrin->instr);
index a3cfa765c0f36256ae234346b84f04027b35520d..a4d3ab1294f3beb3ddc99694d0559ee62ccab8bb 100644 (file)
@@ -899,7 +899,7 @@ gen9_emit_preempt_wa(struct brw_context *brw,
                      const struct _mesa_prim *prim)
 {
    bool object_preemption = true;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
 
    /* Only apply these workarounds for gen9 */
    assert(devinfo->gen == 9);
index deb4ba5697da8926068e0b76306466c6e7a14af4..ac9ee2dabf10e2d62ed4a89d1ce5c60a00f0cf8b 100644 (file)
@@ -48,7 +48,7 @@
 void
 brw_enable_obj_preemption(struct brw_context *brw, bool enable)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
    assert(devinfo->gen >= 9);
 
    if (enable == brw->object_preemption)