i965: batchbuffer: write correct canonical offset with softpin

Addresses in the command streams should be in canonical form (i.e
bit[63:48] == bit[47]). If the [bo->gtt_offset, bo->gtt_offset +
target_offset] range contains the address 0x800000000000, the current
code will fail that criteria.

v2: Fix missing include (Lionel)

Fixes: 1c9053d0765dc6 ("i965: Prepare batchbuffer module for softpin support.")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index df999ffeb1d0ecc1b2e1fc115ea6c32b785629ea..65d2c64e3198708fd913e2354ba772dc2a54b59c 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -32,6 +32,7 @@
 #include "brw_defines.h"
 #include "brw_state.h"
 #include "common/gen_decoder.h"
+#include "common/gen_gem.h"
 
 #include "util/hash_table.h"
 
@@ -922,7 +923,7 @@ emit_reloc(struct intel_batchbuffer *batch,
 
    if (target->kflags & EXEC_OBJECT_PINNED) {
       brw_use_pinned_bo(batch, target, reloc_flags & RELOC_WRITE);
-      return target->gtt_offset + target_offset;
+      return gen_canonical_address(target->gtt_offset + target_offset);
    }
 
    unsigned int index = add_exec_bo(batch, target);