radeon: Fix whitespaces

Minor adjustment to whitespace to align text since the indentation changed

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3523>

diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index da831015e3b632988102ccbcb1a2751631f546b5..5dc81a5a3c2f5f1ad6655a54610b9ad3b6de6bcc 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -44,7 +44,7 @@
 #define FW_52_0_3  ((52 << 24) | (0 << 16) | (3 << 8))
 #define FW_52_4_3  ((52 << 24) | (4 << 16) | (3 << 8))
 #define FW_52_8_3  ((52 << 24) | (8 << 16) | (3 << 8))
-#define FW_53      (53 << 24)
+#define FW_53       (53 << 24)
 
 /**
  * flush commands to the hardware

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.h b/src/gallium/drivers/radeon/radeon_vcn_dec.h
index 5a080fdb44cc45243837cdd04eb7883c0683e5e9..00c373a6ee301ce08beed94ef908bf18713320f1 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.h
@@ -52,151 +52,151 @@
    (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) |                     \
     RDECODE_PKT_TYPE_J(type))
 
-#define RDECODE_CMD_MSG_BUFFER              0x00000000
-#define RDECODE_CMD_DPB_BUFFER              0x00000001
-#define RDECODE_CMD_DECODING_TARGET_BUFFER  0x00000002
-#define RDECODE_CMD_FEEDBACK_BUFFER         0x00000003
-#define RDECODE_CMD_PROB_TBL_BUFFER         0x00000004
-#define RDECODE_CMD_SESSION_CONTEXT_BUFFER  0x00000005
-#define RDECODE_CMD_BITSTREAM_BUFFER        0x00000100
-#define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204
-#define RDECODE_CMD_CONTEXT_BUFFER          0x00000206
-
-#define RDECODE_MSG_CREATE  0x00000000
-#define RDECODE_MSG_DECODE  0x00000001
-#define RDECODE_MSG_DESTROY 0x00000002
-
-#define RDECODE_CODEC_H264      0x00000000
-#define RDECODE_CODEC_VC1       0x00000001
-#define RDECODE_CODEC_MPEG2_VLD 0x00000003
-#define RDECODE_CODEC_MPEG4     0x00000004
-#define RDECODE_CODEC_H264_PERF 0x00000007
-#define RDECODE_CODEC_JPEG      0x00000008
-#define RDECODE_CODEC_H265      0x00000010
-#define RDECODE_CODEC_VP9       0x00000011
-
-#define RDECODE_ARRAY_MODE_LINEAR                   0x00000000
-#define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001
-#define RDECODE_ARRAY_MODE_1D_THIN                  0x00000002
-#define RDECODE_ARRAY_MODE_2D_THIN                  0x00000004
-#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004
-#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED  0x00000005
-
-#define RDECODE_H264_PROFILE_BASELINE    0x00000000
-#define RDECODE_H264_PROFILE_MAIN        0x00000001
-#define RDECODE_H264_PROFILE_HIGH        0x00000002
-#define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003
-#define RDECODE_H264_PROFILE_MVC         0x00000004
-
-#define RDECODE_VC1_PROFILE_SIMPLE   0x00000000
-#define RDECODE_VC1_PROFILE_MAIN     0x00000001
-#define RDECODE_VC1_PROFILE_ADVANCED 0x00000002
-
-#define RDECODE_SW_MODE_LINEAR 0x00000000
-#define RDECODE_256B_S         0x00000001
-#define RDECODE_256B_D         0x00000002
-#define RDECODE_4KB_S          0x00000005
-#define RDECODE_4KB_D          0x00000006
-#define RDECODE_64KB_S         0x00000009
-#define RDECODE_64KB_D         0x0000000A
-#define RDECODE_4KB_S_X        0x00000015
-#define RDECODE_4KB_D_X        0x00000016
-#define RDECODE_64KB_S_X       0x00000019
-#define RDECODE_64KB_D_X       0x0000001A
-
-#define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000
-#define RDECODE_MESSAGE_CREATE        0x00000001
-#define RDECODE_MESSAGE_DECODE        0x00000002
-#define RDECODE_MESSAGE_AVC           0x00000006
-#define RDECODE_MESSAGE_VC1           0x00000007
-#define RDECODE_MESSAGE_MPEG2_VLD     0x0000000A
-#define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B
-#define RDECODE_MESSAGE_HEVC          0x0000000D
-#define RDECODE_MESSAGE_VP9           0x0000000E
-
-#define RDECODE_FEEDBACK_PROFILING 0x00000001
-
-#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
-
-#define NUM_BUFFERS 4
-
-#define RDECODE_VP9_PROBS_DATA_SIZE 2304
-
-#define mmUVD_JPEG_CNTL                              0x0200
-#define mmUVD_JPEG_CNTL_BASE_IDX                     1
-#define mmUVD_JPEG_RB_BASE                           0x0201
-#define mmUVD_JPEG_RB_BASE_BASE_IDX                  1
-#define mmUVD_JPEG_RB_WPTR                           0x0202
-#define mmUVD_JPEG_RB_WPTR_BASE_IDX                  1
-#define mmUVD_JPEG_RB_RPTR                           0x0203
-#define mmUVD_JPEG_RB_RPTR_BASE_IDX                  1
-#define mmUVD_JPEG_RB_SIZE                           0x0204
-#define mmUVD_JPEG_RB_SIZE_BASE_IDX                  1
-#define mmUVD_JPEG_TIER_CNTL2                        0x021a
-#define mmUVD_JPEG_TIER_CNTL2_BASE_IDX               1
-#define mmUVD_JPEG_UV_TILING_CTRL                    0x021c
-#define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX           1
-#define mmUVD_JPEG_TILING_CTRL                       0x021e
-#define mmUVD_JPEG_TILING_CTRL_BASE_IDX              1
-#define mmUVD_JPEG_OUTBUF_RPTR                       0x0220
-#define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX              1
-#define mmUVD_JPEG_OUTBUF_WPTR                       0x0221
-#define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX              1
-#define mmUVD_JPEG_PITCH                             0x0222
-#define mmUVD_JPEG_PITCH_BASE_IDX                    1
-#define mmUVD_JPEG_INT_EN                            0x0229
-#define mmUVD_JPEG_INT_EN_BASE_IDX                   1
-#define mmUVD_JPEG_UV_PITCH                          0x022b
-#define mmUVD_JPEG_UV_PITCH_BASE_IDX                 1
-#define mmUVD_JPEG_INDEX                             0x023e
-#define mmUVD_JPEG_INDEX_BASE_IDX                    1
-#define mmUVD_JPEG_DATA                              0x023f
-#define mmUVD_JPEG_DATA_BASE_IDX                     1
-#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH          0x0438
-#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX 1
-#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW           0x0439
-#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX  1
-#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH           0x045a
-#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX  1
-#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW            0x045b
-#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX   1
-#define mmUVD_CTX_INDEX                              0x0528
-#define mmUVD_CTX_INDEX_BASE_IDX                     1
-#define mmUVD_CTX_DATA                               0x0529
-#define mmUVD_CTX_DATA_BASE_IDX                      1
-#define mmUVD_SOFT_RESET                             0x05a0
-#define mmUVD_SOFT_RESET_BASE_IDX                    1
-
-#define vcnipUVD_JPEG_DEC_SOFT_RST             0x402f
-#define vcnipUVD_JRBC_IB_COND_RD_TIMER         0x408e
-#define vcnipUVD_JRBC_IB_REF_DATA              0x408f
-#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH  0x40e1
-#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW   0x40e0
-#define vcnipUVD_JPEG_RB_BASE                  0x4001
-#define vcnipUVD_JPEG_RB_SIZE                  0x4004
-#define vcnipUVD_JPEG_RB_WPTR                  0x4002
-#define vcnipUVD_JPEG_PITCH                    0x401f
-#define vcnipUVD_JPEG_UV_PITCH                 0x4020
-#define vcnipJPEG_DEC_ADDR_MODE                0x4027
-#define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE   0x4024
-#define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE  0x4025
-#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x40e3
-#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW  0x40e2
-#define vcnipUVD_JPEG_INDEX                    0x402c
-#define vcnipUVD_JPEG_DATA                     0x402d
-#define vcnipUVD_JPEG_TIER_CNTL2               0x400f
-#define vcnipUVD_JPEG_OUTBUF_RPTR              0x401e
-#define vcnipUVD_JPEG_OUTBUF_CNTL              0x401c
-#define vcnipUVD_JPEG_INT_EN                   0x400a
-#define vcnipUVD_JPEG_CNTL                     0x4000
-#define vcnipUVD_JPEG_RB_RPTR                  0x4003
-#define vcnipUVD_JPEG_OUTBUF_WPTR              0x401d
-
-#define UVD_BASE_INST0_SEG0 0x00007800
-#define UVD_BASE_INST0_SEG1 0x00007E00
-#define UVD_BASE_INST0_SEG2 0
-#define UVD_BASE_INST0_SEG3 0
-#define UVD_BASE_INST0_SEG4 0
+#define RDECODE_CMD_MSG_BUFFER                              0x00000000
+#define RDECODE_CMD_DPB_BUFFER                              0x00000001
+#define RDECODE_CMD_DECODING_TARGET_BUFFER                  0x00000002
+#define RDECODE_CMD_FEEDBACK_BUFFER                         0x00000003
+#define RDECODE_CMD_PROB_TBL_BUFFER                         0x00000004
+#define RDECODE_CMD_SESSION_CONTEXT_BUFFER                  0x00000005
+#define RDECODE_CMD_BITSTREAM_BUFFER                        0x00000100
+#define RDECODE_CMD_IT_SCALING_TABLE_BUFFER                 0x00000204
+#define RDECODE_CMD_CONTEXT_BUFFER                          0x00000206
+
+#define RDECODE_MSG_CREATE                                  0x00000000
+#define RDECODE_MSG_DECODE                                  0x00000001
+#define RDECODE_MSG_DESTROY                                 0x00000002
+
+#define RDECODE_CODEC_H264                                  0x00000000
+#define RDECODE_CODEC_VC1                                   0x00000001
+#define RDECODE_CODEC_MPEG2_VLD                             0x00000003
+#define RDECODE_CODEC_MPEG4                                 0x00000004
+#define RDECODE_CODEC_H264_PERF                             0x00000007
+#define RDECODE_CODEC_JPEG                                  0x00000008
+#define RDECODE_CODEC_H265                                  0x00000010
+#define RDECODE_CODEC_VP9                                   0x00000011
+
+#define RDECODE_ARRAY_MODE_LINEAR                           0x00000000
+#define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED         0x00000001
+#define RDECODE_ARRAY_MODE_1D_THIN                          0x00000002
+#define RDECODE_ARRAY_MODE_2D_THIN                          0x00000004
+#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR         0x00000004
+#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED          0x00000005
+
+#define RDECODE_H264_PROFILE_BASELINE                       0x00000000
+#define RDECODE_H264_PROFILE_MAIN                           0x00000001
+#define RDECODE_H264_PROFILE_HIGH                           0x00000002
+#define RDECODE_H264_PROFILE_STEREO_HIGH                    0x00000003
+#define RDECODE_H264_PROFILE_MVC                            0x00000004
+
+#define RDECODE_VC1_PROFILE_SIMPLE                          0x00000000
+#define RDECODE_VC1_PROFILE_MAIN                            0x00000001
+#define RDECODE_VC1_PROFILE_ADVANCED                        0x00000002
+
+#define RDECODE_SW_MODE_LINEAR                              0x00000000
+#define RDECODE_256B_S                                      0x00000001
+#define RDECODE_256B_D                                      0x00000002
+#define RDECODE_4KB_S                                       0x00000005
+#define RDECODE_4KB_D                                       0x00000006
+#define RDECODE_64KB_S                                      0x00000009
+#define RDECODE_64KB_D                                      0x0000000A
+#define RDECODE_4KB_S_X                                     0x00000015
+#define RDECODE_4KB_D_X                                     0x00000016
+#define RDECODE_64KB_S_X                                    0x00000019
+#define RDECODE_64KB_D_X                                    0x0000001A
+
+#define RDECODE_MESSAGE_NOT_SUPPORTED                       0x00000000
+#define RDECODE_MESSAGE_CREATE                              0x00000001
+#define RDECODE_MESSAGE_DECODE                              0x00000002
+#define RDECODE_MESSAGE_AVC                                 0x00000006
+#define RDECODE_MESSAGE_VC1                                 0x00000007
+#define RDECODE_MESSAGE_MPEG2_VLD                           0x0000000A
+#define RDECODE_MESSAGE_MPEG4_ASP_VLD                       0x0000000B
+#define RDECODE_MESSAGE_HEVC                                0x0000000D
+#define RDECODE_MESSAGE_VP9                                 0x0000000E
+
+#define RDECODE_FEEDBACK_PROFILING                          0x00000001
+
+#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT  7
+
+#define NUM_BUFFERS                                         4
+
+#define RDECODE_VP9_PROBS_DATA_SIZE                         2304
+
+#define mmUVD_JPEG_CNTL                                     0x0200
+#define mmUVD_JPEG_CNTL_BASE_IDX                            1
+#define mmUVD_JPEG_RB_BASE                                  0x0201
+#define mmUVD_JPEG_RB_BASE_BASE_IDX                         1
+#define mmUVD_JPEG_RB_WPTR                                  0x0202
+#define mmUVD_JPEG_RB_WPTR_BASE_IDX                         1
+#define mmUVD_JPEG_RB_RPTR                                  0x0203
+#define mmUVD_JPEG_RB_RPTR_BASE_IDX                         1
+#define mmUVD_JPEG_RB_SIZE                                  0x0204
+#define mmUVD_JPEG_RB_SIZE_BASE_IDX                         1
+#define mmUVD_JPEG_TIER_CNTL2                               0x021a
+#define mmUVD_JPEG_TIER_CNTL2_BASE_IDX                      1
+#define mmUVD_JPEG_UV_TILING_CTRL                           0x021c
+#define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX                  1
+#define mmUVD_JPEG_TILING_CTRL                              0x021e
+#define mmUVD_JPEG_TILING_CTRL_BASE_IDX                     1
+#define mmUVD_JPEG_OUTBUF_RPTR                              0x0220
+#define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX                     1
+#define mmUVD_JPEG_OUTBUF_WPTR                              0x0221
+#define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX                     1
+#define mmUVD_JPEG_PITCH                                    0x0222
+#define mmUVD_JPEG_PITCH_BASE_IDX                           1
+#define mmUVD_JPEG_INT_EN                                   0x0229
+#define mmUVD_JPEG_INT_EN_BASE_IDX                          1
+#define mmUVD_JPEG_UV_PITCH                                 0x022b
+#define mmUVD_JPEG_UV_PITCH_BASE_IDX                        1
+#define mmUVD_JPEG_INDEX                                    0x023e
+#define mmUVD_JPEG_INDEX_BASE_IDX                           1
+#define mmUVD_JPEG_DATA                                     0x023f
+#define mmUVD_JPEG_DATA_BASE_IDX                            1
+#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH                 0x0438
+#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX        1
+#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW                  0x0439
+#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX         1
+#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH                  0x045a
+#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX         1
+#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW                   0x045b
+#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX          1
+#define mmUVD_CTX_INDEX                                     0x0528
+#define mmUVD_CTX_INDEX_BASE_IDX                            1
+#define mmUVD_CTX_DATA                                      0x0529
+#define mmUVD_CTX_DATA_BASE_IDX                             1
+#define mmUVD_SOFT_RESET                                    0x05a0
+#define mmUVD_SOFT_RESET_BASE_IDX                           1
+
+#define vcnipUVD_JPEG_DEC_SOFT_RST                          0x402f
+#define vcnipUVD_JRBC_IB_COND_RD_TIMER                      0x408e
+#define vcnipUVD_JRBC_IB_REF_DATA                           0x408f
+#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH               0x40e1
+#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW                0x40e0
+#define vcnipUVD_JPEG_RB_BASE                               0x4001
+#define vcnipUVD_JPEG_RB_SIZE                               0x4004
+#define vcnipUVD_JPEG_RB_WPTR                               0x4002
+#define vcnipUVD_JPEG_PITCH                                 0x401f
+#define vcnipUVD_JPEG_UV_PITCH                              0x4020
+#define vcnipJPEG_DEC_ADDR_MODE                             0x4027
+#define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE                0x4024
+#define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE               0x4025
+#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH              0x40e3
+#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW               0x40e2
+#define vcnipUVD_JPEG_INDEX                                 0x402c
+#define vcnipUVD_JPEG_DATA                                  0x402d
+#define vcnipUVD_JPEG_TIER_CNTL2                            0x400f
+#define vcnipUVD_JPEG_OUTBUF_RPTR                           0x401e
+#define vcnipUVD_JPEG_OUTBUF_CNTL                           0x401c
+#define vcnipUVD_JPEG_INT_EN                                0x400a
+#define vcnipUVD_JPEG_CNTL                                  0x4000
+#define vcnipUVD_JPEG_RB_RPTR                               0x4003
+#define vcnipUVD_JPEG_OUTBUF_WPTR                           0x401d
+
+#define UVD_BASE_INST0_SEG0                                 0x00007800
+#define UVD_BASE_INST0_SEG1                                 0x00007E00
+#define UVD_BASE_INST0_SEG2                                 0
+#define UVD_BASE_INST0_SEG3                                 0
+#define UVD_BASE_INST0_SEG4                                 0
 
 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg)
 

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.h b/src/gallium/drivers/radeon/radeon_vcn_enc.h
index 011f66b47ecfde72d4a9d903b7cf29c317e15452..cf63602966ee2192e13a80c332741e21a3bdaca8 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.h
@@ -30,98 +30,98 @@
 
 #include "radeon_video.h"
 
-#define RENCODE_IB_OP_INITIALIZE                0x01000001
-#define RENCODE_IB_OP_CLOSE_SESSION             0x01000002
-#define RENCODE_IB_OP_ENCODE                    0x01000003
-#define RENCODE_IB_OP_INIT_RC                   0x01000004
-#define RENCODE_IB_OP_INIT_RC_VBV_BUFFER_LEVEL  0x01000005
-#define RENCODE_IB_OP_SET_SPEED_ENCODING_MODE   0x01000006
-#define RENCODE_IB_OP_SET_BALANCE_ENCODING_MODE 0x01000007
-#define RENCODE_IB_OP_SET_QUALITY_ENCODING_MODE 0x01000008
-
-#define RENCODE_IF_MAJOR_VERSION_MASK  0xFFFF0000
-#define RENCODE_IF_MAJOR_VERSION_SHIFT 16
-#define RENCODE_IF_MINOR_VERSION_MASK  0x0000FFFF
-#define RENCODE_IF_MINOR_VERSION_SHIFT 0
-
-#define RENCODE_ENGINE_TYPE_ENCODE 1
-
-#define RENCODE_ENCODE_STANDARD_HEVC 0
-#define RENCODE_ENCODE_STANDARD_H264 1
-
-#define RENCODE_PREENCODE_MODE_NONE 0x00000000
-#define RENCODE_PREENCODE_MODE_1X   0x00000001
-#define RENCODE_PREENCODE_MODE_2X   0x00000002
-#define RENCODE_PREENCODE_MODE_4X   0x00000004
-
-#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_MBS  0x00000000
-#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_BITS 0x00000001
-
-#define RENCODE_HEVC_SLICE_CONTROL_MODE_FIXED_CTBS 0x00000000
-#define RENCODE_HEVC_SLICE_CONTROL_MODE_FIXED_BITS 0x00000001
-
-#define RENCODE_RATE_CONTROL_METHOD_NONE                    0x00000000
-#define RENCODE_RATE_CONTROL_METHOD_LATENCY_CONSTRAINED_VBR 0x00000001
-#define RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR    0x00000002
-#define RENCODE_RATE_CONTROL_METHOD_CBR                     0x00000003
-
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_AUD             0x00000000
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_VPS             0x00000001
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_SPS             0x00000002
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PPS             0x00000003
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PREFIX          0x00000004
-#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_END_OF_SEQUENCE 0x00000005
-
-#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS 16
-#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS        16
-
-#define RENCODE_HEADER_INSTRUCTION_END  0x00000000
-#define RENCODE_HEADER_INSTRUCTION_COPY 0x00000001
-
-#define RENCODE_HEVC_HEADER_INSTRUCTION_DEPENDENT_SLICE_END 0x00010000
-#define RENCODE_HEVC_HEADER_INSTRUCTION_FIRST_SLICE         0x00010001
-#define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT       0x00010002
-#define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_QP_DELTA      0x00010003
-
-#define RENCODE_H264_HEADER_INSTRUCTION_FIRST_MB       0x00020000
-#define RENCODE_H264_HEADER_INSTRUCTION_SLICE_QP_DELTA 0x00020001
-
-#define RENCODE_PICTURE_TYPE_B      0
-#define RENCODE_PICTURE_TYPE_P      1
-#define RENCODE_PICTURE_TYPE_I      2
-#define RENCODE_PICTURE_TYPE_P_SKIP 3
-
-#define RENCODE_INPUT_SWIZZLE_MODE_LINEAR 0
-#define RENCODE_INPUT_SWIZZLE_MODE_256B_S 1
-#define RENCODE_INPUT_SWIZZLE_MODE_4kB_S  5
-#define RENCODE_INPUT_SWIZZLE_MODE_64kB_S 9
-
-#define RENCODE_H264_PICTURE_STRUCTURE_FRAME        0
-#define RENCODE_H264_PICTURE_STRUCTURE_TOP_FIELD    1
-#define RENCODE_H264_PICTURE_STRUCTURE_BOTTOM_FIELD 2
-
-#define RENCODE_H264_INTERLACING_MODE_PROGRESSIVE            0
-#define RENCODE_H264_INTERLACING_MODE_INTERLACED_STACKED     1
-#define RENCODE_H264_INTERLACING_MODE_INTERLACED_INTERLEAVED 2
-
-#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_ENABLE                        0
-#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISABLE                       1
-#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISALBE_ACROSS_SLICE_BOUNDARY 2
-
-#define RENCODE_INTRA_REFRESH_MODE_NONE           0
-#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_ROWS    1
-#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_COLUMNS 2
-
-#define RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES 34
-
-#define RENCODE_REC_SWIZZLE_MODE_LINEAR 0
-#define RENCODE_REC_SWIZZLE_MODE_256B_S 1
-
-#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_LINEAR   0
-#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_CIRCULAR 1
-
-#define RENCODE_FEEDBACK_BUFFER_MODE_LINEAR   0
-#define RENCODE_FEEDBACK_BUFFER_MODE_CIRCULAR 1
+#define RENCODE_IB_OP_INITIALIZE                                                    0x01000001
+#define RENCODE_IB_OP_CLOSE_SESSION                                                 0x01000002
+#define RENCODE_IB_OP_ENCODE                                                        0x01000003
+#define RENCODE_IB_OP_INIT_RC                                                       0x01000004
+#define RENCODE_IB_OP_INIT_RC_VBV_BUFFER_LEVEL                                      0x01000005
+#define RENCODE_IB_OP_SET_SPEED_ENCODING_MODE                                       0x01000006
+#define RENCODE_IB_OP_SET_BALANCE_ENCODING_MODE                                     0x01000007
+#define RENCODE_IB_OP_SET_QUALITY_ENCODING_MODE                                     0x01000008
+
+#define RENCODE_IF_MAJOR_VERSION_MASK                                               0xFFFF0000
+#define RENCODE_IF_MAJOR_VERSION_SHIFT                                              16
+#define RENCODE_IF_MINOR_VERSION_MASK                                               0x0000FFFF
+#define RENCODE_IF_MINOR_VERSION_SHIFT                                              0
+
+#define RENCODE_ENGINE_TYPE_ENCODE                                                  1
+
+#define RENCODE_ENCODE_STANDARD_HEVC                                                0
+#define RENCODE_ENCODE_STANDARD_H264                                                1
+
+#define RENCODE_PREENCODE_MODE_NONE                                                 0x00000000
+#define RENCODE_PREENCODE_MODE_1X                                                   0x00000001
+#define RENCODE_PREENCODE_MODE_2X                                                   0x00000002
+#define RENCODE_PREENCODE_MODE_4X                                                   0x00000004
+
+#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_MBS                                   0x00000000
+#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_BITS                                  0x00000001
+
+#define RENCODE_HEVC_SLICE_CONTROL_MODE_FIXED_CTBS                                  0x00000000
+#define RENCODE_HEVC_SLICE_CONTROL_MODE_FIXED_BITS                                  0x00000001
+
+#define RENCODE_RATE_CONTROL_METHOD_NONE                                            0x00000000
+#define RENCODE_RATE_CONTROL_METHOD_LATENCY_CONSTRAINED_VBR                         0x00000001
+#define RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR                            0x00000002
+#define RENCODE_RATE_CONTROL_METHOD_CBR                                             0x00000003
+
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_AUD                                         0x00000000
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_VPS                                         0x00000001
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_SPS                                         0x00000002
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PPS                                         0x00000003
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PREFIX                                      0x00000004
+#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_END_OF_SEQUENCE                             0x00000005
+
+#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS                   16
+#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS                          16
+
+#define RENCODE_HEADER_INSTRUCTION_END                                              0x00000000
+#define RENCODE_HEADER_INSTRUCTION_COPY                                             0x00000001
+
+#define RENCODE_HEVC_HEADER_INSTRUCTION_DEPENDENT_SLICE_END                         0x00010000
+#define RENCODE_HEVC_HEADER_INSTRUCTION_FIRST_SLICE                                 0x00010001
+#define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT                               0x00010002
+#define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_QP_DELTA                              0x00010003
+
+#define RENCODE_H264_HEADER_INSTRUCTION_FIRST_MB                                    0x00020000
+#define RENCODE_H264_HEADER_INSTRUCTION_SLICE_QP_DELTA                              0x00020001
+
+#define RENCODE_PICTURE_TYPE_B                                                      0
+#define RENCODE_PICTURE_TYPE_P                                                      1
+#define RENCODE_PICTURE_TYPE_I                                                      2
+#define RENCODE_PICTURE_TYPE_P_SKIP                                                 3
+
+#define RENCODE_INPUT_SWIZZLE_MODE_LINEAR                                           0
+#define RENCODE_INPUT_SWIZZLE_MODE_256B_S                                           1
+#define RENCODE_INPUT_SWIZZLE_MODE_4kB_S                                            5
+#define RENCODE_INPUT_SWIZZLE_MODE_64kB_S                                           9
+
+#define RENCODE_H264_PICTURE_STRUCTURE_FRAME                                        0
+#define RENCODE_H264_PICTURE_STRUCTURE_TOP_FIELD                                    1
+#define RENCODE_H264_PICTURE_STRUCTURE_BOTTOM_FIELD                                 2
+
+#define RENCODE_H264_INTERLACING_MODE_PROGRESSIVE                                   0
+#define RENCODE_H264_INTERLACING_MODE_INTERLACED_STACKED                            1
+#define RENCODE_H264_INTERLACING_MODE_INTERLACED_INTERLEAVED                        2
+
+#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_ENABLE                           0
+#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISABLE                          1
+#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISALBE_ACROSS_SLICE_BOUNDARY    2
+
+#define RENCODE_INTRA_REFRESH_MODE_NONE                                             0
+#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_ROWS                                      1
+#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_COLUMNS                                   2
+
+#define RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES                                      34
+
+#define RENCODE_REC_SWIZZLE_MODE_LINEAR                                             0
+#define RENCODE_REC_SWIZZLE_MODE_256B_S                                             1
+
+#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_LINEAR                                  0
+#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_CIRCULAR                                1
+
+#define RENCODE_FEEDBACK_BUFFER_MODE_LINEAR                                         0
+#define RENCODE_FEEDBACK_BUFFER_MODE_CIRCULAR                                       1
 
 #define RADEON_ENC_CS(value) (enc->cs->current.buf[enc->cs->current.cdw++] = (value))
 #define RADEON_ENC_BEGIN(cmd)                                                                      \

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index 7607987f0d5405619f0590dd4c218c3fc5fa17b9..66b4578f0f726b4393d37bccaa4767b8107d5879 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -53,14 +53,14 @@
 #define RENCODE_IB_PARAM_FEEDBACK_BUFFER           0x00000010
 #define RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU        0x00000020
 
-#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL     0x00100001
-#define RENCODE_HEVC_IB_PARAM_SPEC_MISC         0x00100002
-#define RENCODE_HEVC_IB_PARAM_DEBLOCKING_FILTER 0x00100003
+#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL        0x00100001
+#define RENCODE_HEVC_IB_PARAM_SPEC_MISC            0x00100002
+#define RENCODE_HEVC_IB_PARAM_DEBLOCKING_FILTER    0x00100003
 
-#define RENCODE_H264_IB_PARAM_SLICE_CONTROL     0x00200001
-#define RENCODE_H264_IB_PARAM_SPEC_MISC         0x00200002
-#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS     0x00200003
-#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER 0x00200004
+#define RENCODE_H264_IB_PARAM_SLICE_CONTROL        0x00200001
+#define RENCODE_H264_IB_PARAM_SPEC_MISC            0x00200002
+#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS        0x00200003
+#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER    0x00200004
 
 static void radeon_enc_session_info(struct radeon_encoder *enc)
 {
@@ -296,8 +296,8 @@ static void radeon_enc_nalu_sps(struct radeon_encoder *enc)
 
    if (enc->enc_pic.spec_misc.profile_idc == 100 || enc->enc_pic.spec_misc.profile_idc == 110 ||
        enc->enc_pic.spec_misc.profile_idc == 122 || enc->enc_pic.spec_misc.profile_idc == 244 ||
-       enc->enc_pic.spec_misc.profile_idc == 44 || enc->enc_pic.spec_misc.profile_idc == 83 ||
-       enc->enc_pic.spec_misc.profile_idc == 86 || enc->enc_pic.spec_misc.profile_idc == 118 ||
+       enc->enc_pic.spec_misc.profile_idc == 44  || enc->enc_pic.spec_misc.profile_idc == 83 ||
+       enc->enc_pic.spec_misc.profile_idc == 86  || enc->enc_pic.spec_misc.profile_idc == 118 ||
        enc->enc_pic.spec_misc.profile_idc == 128 || enc->enc_pic.spec_misc.profile_idc == 138) {
       radeon_enc_code_ue(enc, 0x1);
       radeon_enc_code_ue(enc, 0x0);
@@ -324,8 +324,8 @@ static void radeon_enc_nalu_sps(struct radeon_encoder *enc)
 
    radeon_enc_code_fixed_bits(enc, 0x1, 1);
 
-   if ((enc->enc_pic.crop_left != 0) || (enc->enc_pic.crop_right != 0) ||
-       (enc->enc_pic.crop_top != 0) || (enc->enc_pic.crop_bottom != 0)) {
+   if ((enc->enc_pic.crop_left != 0) || (enc->enc_pic.crop_right  != 0) ||
+       (enc->enc_pic.crop_top  != 0) || (enc->enc_pic.crop_bottom != 0)) {
       radeon_enc_code_fixed_bits(enc, 0x1, 1);
       radeon_enc_code_ue(enc, enc->enc_pic.crop_left);
       radeon_enc_code_ue(enc, enc->enc_pic.crop_right);

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
index 545bb90227738d6a6e6a7b3e1d7aede286034308..52a6ee7e85bbe4965910449fc4eeae61fa754208 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
@@ -33,8 +33,8 @@
 
 #include <stdio.h>
 
-#define RENCODE_FW_INTERFACE_MAJOR_VERSION 1
-#define RENCODE_FW_INTERFACE_MINOR_VERSION 1
+#define RENCODE_FW_INTERFACE_MAJOR_VERSION         1
+#define RENCODE_FW_INTERFACE_MINOR_VERSION         1
 
 #define RENCODE_IB_PARAM_SESSION_INFO              0x00000001
 #define RENCODE_IB_PARAM_TASK_INFO                 0x00000002
@@ -55,23 +55,23 @@
 #define RENCODE_IB_PARAM_VIDEO_BITSTREAM_BUFFER    0x00000012
 #define RENCODE_IB_PARAM_FEEDBACK_BUFFER           0x00000015
 
-#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL 0x00100001
-#define RENCODE_HEVC_IB_PARAM_SPEC_MISC     0x00100002
-#define RENCODE_HEVC_IB_PARAM_LOOP_FILTER   0x00100003
+#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL        0x00100001
+#define RENCODE_HEVC_IB_PARAM_SPEC_MISC            0x00100002
+#define RENCODE_HEVC_IB_PARAM_LOOP_FILTER          0x00100003
 
-#define RENCODE_H264_IB_PARAM_SLICE_CONTROL     0x00200001
-#define RENCODE_H264_IB_PARAM_SPEC_MISC         0x00200002
-#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS     0x00200003
-#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER 0x00200004
+#define RENCODE_H264_IB_PARAM_SLICE_CONTROL        0x00200001
+#define RENCODE_H264_IB_PARAM_SPEC_MISC            0x00200002
+#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS        0x00200003
+#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER    0x00200004
 
-#define RENCODE_COLOR_VOLUME_G22_BT709  0
-#define RENCODE_COLOR_VOLUME_G10_BT2020 3
+#define RENCODE_COLOR_VOLUME_G22_BT709             0
+#define RENCODE_COLOR_VOLUME_G10_BT2020            3
 
-#define RENCODE_COLOR_BIT_DEPTH_8_BIT  0
-#define RENCODE_COLOR_BIT_DEPTH_10_BIT 1
+#define RENCODE_COLOR_BIT_DEPTH_8_BIT              0
+#define RENCODE_COLOR_BIT_DEPTH_10_BIT             1
 
-#define RENCODE_COLOR_PACKING_FORMAT_NV12 0
-#define RENCODE_COLOR_PACKING_FORMAT_P010 1
+#define RENCODE_COLOR_PACKING_FORMAT_NV12          0
+#define RENCODE_COLOR_PACKING_FORMAT_P010          1
 
 static void radeon_enc_quality_params(struct radeon_encoder *enc)
 {