anv/apply_pipeline_layout: Initialize the nir_builder before use

Fixes: #2410
Fixes: 3c754900b5f "nir: don't emit ishl in _nir_mul_imm() if backend doesn't support bitops"
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3548>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3548>

diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 0c0e44f657b4c957534b0e82ea01c1d57a7446bf..5be8cc22f99c7966f4e065e92846e2a564ce226b 100644 (file)
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -1328,6 +1328,8 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
       if (!function->impl)
          continue;
 
+      nir_builder_init(&state.builder, function->impl);
+
       /* Before we do the normal lowering, we look for any SSBO operations
        * that we can lower to the BTI model and lower them up-front.  The BTI
        * model can perform better than the A64 model for a couple reasons:
@@ -1360,7 +1362,6 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
        */
       lower_direct_buffer_access(function->impl, &state);
 
-      nir_builder_init(&state.builder, function->impl);
       nir_foreach_block(block, function->impl)
          apply_pipeline_layout_block(block, &state);
       nir_metadata_preserve(function->impl, nir_metadata_block_index |