radv: increase minimum NGG vertex count requirement per workgroup on GFX 10.3
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 4 Aug 2020 08:56:51 +0000 (10:56 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 5 Aug 2020 10:57:46 +0000 (12:57 +0200)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>

src/amd/vulkan/radv_pipeline.c

index 6d4df832fe5a43ede2b3efe631c8f18f0f25bac4..acca6c01315236859a1a544cbd9b4b3c2e9c559e 100644 (file)
@@ -1939,6 +1939,7 @@ gfx10_get_ngg_info(const struct radv_pipeline_key *key,
        unsigned gsprim_lds_size = 0;
 
        /* All these are per subgroup: */
+       const unsigned min_esverts = pipeline->device->physical_device->rad_info.chip_class >= GFX10_3 ? 29 : 24;
        bool max_vert_out_per_gs_instance = false;
        unsigned max_esverts_base = 256;
        unsigned max_gsprims_base = 128; /* default prim group size clamp */
@@ -2064,7 +2065,7 @@ gfx10_get_ngg_info(const struct radv_pipeline_key *key,
        }
 
        /* Hardware restriction: minimum value of max_esverts */
-       max_esverts = MAX2(max_esverts, 23 + max_verts_per_prim);
+       max_esverts = MAX2(max_esverts, min_esverts - 1 + max_verts_per_prim);
 
        unsigned max_out_vertices =
                max_vert_out_per_gs_instance ? gs_info->gs.vertices_out :
@@ -2101,7 +2102,7 @@ gfx10_get_ngg_info(const struct radv_pipeline_key *key,
 
        pipeline->graphics.esgs_ring_size = ngg->esgs_ring_size;
 
-       assert(ngg->hw_max_esverts >= 24); /* HW limitation */
+       assert(ngg->hw_max_esverts >= min_esverts); /* HW limitation */
 }
 
 static void