pan/midgard: Don't special case inline_constant
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tue, 30 Jul 2019 19:25:21 +0000 (12:25 -0700)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 31 Jul 2019 17:59:19 +0000 (10:59 -0700)
Another constant source of bugs. Ain't that special.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/panfrost/midgard/midgard_compile.c
src/panfrost/midgard/midgard_liveness.c
src/panfrost/midgard/midgard_opt_dce.c
src/panfrost/midgard/midgard_opt_invert.c
src/panfrost/midgard/midgard_ra.c
src/panfrost/midgard/midgard_schedule.c
src/panfrost/midgard/mir.c

index 8126c1e25a6abb572c995a092554a98b9b8c4a05..d36caa3193d15211040dee9c8ef73dca9cfd1bb3 100644 (file)
@@ -1921,7 +1921,7 @@ embedded_to_inline_constant(compiler_context *ctx)
 
                         /* Get rid of the embedded constant */
                         ins->has_constants = false;
-                        ins->ssa_args.src1 = SSA_UNUSED_0;
+                        ins->ssa_args.src1 = -1;
                         ins->ssa_args.inline_constant = true;
                         ins->inline_constant = scaled_constant;
                 }
index 1dfe980467bbc6b94c2ced415c5a6f420c99fd40..e3fa2520acf7ef5c169b19422e3f65f50ca6f445 100644 (file)
@@ -34,7 +34,7 @@ midgard_is_live_in_instr(midgard_instruction *ins, int src)
         if (ins->ssa_args.src0 == src)
                 return true;
 
-        if (!ins->ssa_args.inline_constant && ins->ssa_args.src1 == src)
+        if (ins->ssa_args.src1 == src)
                 return true;
 
         return false;
index 0abbf03b5514378c877e72214ac004d62f6beffa..401113c3093f14d4242a652364d4dda49ff05a4b 100644 (file)
@@ -113,7 +113,6 @@ midgard_opt_post_move_eliminate(compiler_context *ctx, midgard_block *block, str
                         ra_get_node_reg(g, iB);
 
                 if (A != B) continue;
-                if (ins->ssa_args.inline_constant) continue;
 
                 /* Check we're in the work zone. TODO: promoted
                  * uniforms? */
index f5c10981ccbbfb7f15a796fa05fcdeb5fd97b9de..1e6c5b383eac64a0c4181c29f4b682f1ed15fa7a 100644 (file)
@@ -42,7 +42,7 @@ midgard_lower_invert(compiler_context *ctx, midgard_block *block)
                         .mask = ins->mask,
                         .ssa_args = {
                                 .src0 = temp,
-                                .src1 = 0,
+                                .src1 = -1,
                                 .dest = ins->ssa_args.dest,
                                 .inline_constant = true
                         },
index 312759c4a1d2a7bf3a672325fffc0bacd5a2bab9..4f7844bbcbaa31db16d57e52a36a9dfb73586c3a 100644 (file)
@@ -422,9 +422,7 @@ mir_lower_special_reads(compiler_context *ctx)
                 case TAG_ALU_4:
                         mark_node_class(aluw, ins->ssa_args.dest);
                         mark_node_class(alur, ins->ssa_args.src0);
-
-                        if (!ins->ssa_args.inline_constant)
-                                mark_node_class(alur, ins->ssa_args.src1);
+                        mark_node_class(alur, ins->ssa_args.src1);
 
                         break;
                 case TAG_LOAD_STORE_4:
@@ -604,9 +602,7 @@ allocate_registers(compiler_context *ctx, bool *spilled)
         mir_foreach_instr_global(ctx, ins) {
                 assert(check_write_class(found_class, ins->type, ins->ssa_args.dest));
                 assert(check_read_class(found_class, ins->type, ins->ssa_args.src0));
-
-                if (!ins->ssa_args.inline_constant)
-                        assert(check_read_class(found_class, ins->type, ins->ssa_args.src1));
+                assert(check_read_class(found_class, ins->type, ins->ssa_args.src1));
         }
 
         for (unsigned i = 0; i < ctx->temp_count; ++i) {
@@ -651,9 +647,6 @@ allocate_registers(compiler_context *ctx, bool *spilled)
                         for (int src = 0; src < 2; ++src) {
                                 int s = sources[src];
 
-                                if (ins->ssa_args.inline_constant && src == 1)
-                                        continue;
-
                                 if (s < 0) continue;
 
                                 if (s >= SSA_FIXED_MINIMUM) continue;
@@ -718,9 +711,8 @@ install_registers_instr(
 
         switch (ins->type) {
         case TAG_ALU_4: {
-                int adjusted_src = args.inline_constant ? -1 : args.src1;
                 struct phys_reg src1 = index_to_reg(ctx, g, args.src0);
-                struct phys_reg src2 = index_to_reg(ctx, g, adjusted_src);
+                struct phys_reg src2 = index_to_reg(ctx, g, args.src1);
                 struct phys_reg dest = index_to_reg(ctx, g, args.dest);
 
                 unsigned uncomposed_mask = ins->mask;
index e4bc68281278dcce08a1e7ac8b550fef6b0a55c6..7ad45f2a06653bbf4df7280eba9334a2804a9fb5 100644 (file)
@@ -285,13 +285,10 @@ schedule_bundle(compiler_context *ctx, midgard_block *block, midgard_instruction
 
                                         could_scalar &= !s1.half;
 
-                                        if (!ains->ssa_args.inline_constant) {
-                                                midgard_vector_alu_src s2 =
-                                                        vector_alu_from_unsigned(ains->alu.src2);
-
-                                                could_scalar &= !s2.half;
-                                        }
+                                        midgard_vector_alu_src s2 =
+                                                vector_alu_from_unsigned(ains->alu.src2);
 
+                                        could_scalar &= !s2.half;
                                 }
 
                                 bool scalar = could_scalar && scalarable;
@@ -688,10 +685,7 @@ mir_squeeze_index(compiler_context *ctx)
         mir_foreach_instr_global(ctx, ins) {
                 ins->ssa_args.dest = find_or_allocate_temp(ctx, ins->ssa_args.dest);
                 ins->ssa_args.src0 = find_or_allocate_temp(ctx, ins->ssa_args.src0);
-
-                if (!ins->ssa_args.inline_constant)
-                        ins->ssa_args.src1 = find_or_allocate_temp(ctx, ins->ssa_args.src1);
-
+                ins->ssa_args.src1 = find_or_allocate_temp(ctx, ins->ssa_args.src1);
         }
 }
 
index 13dd2d816c9b9e0f986a3f32a3f909d59d07e592..045948a74b52ae8475f756de7a7543e1ee5bfcb4 100644 (file)
@@ -29,8 +29,7 @@ void mir_rewrite_index_src_single(midgard_instruction *ins, unsigned old, unsign
         if (ins->ssa_args.src0 == old)
                 ins->ssa_args.src0 = new;
 
-        if (ins->ssa_args.src1 == old &&
-            !ins->ssa_args.inline_constant)
+        if (ins->ssa_args.src1 == old)
                 ins->ssa_args.src1 = new;
 }
 
@@ -104,8 +103,7 @@ mir_rewrite_index_src_single_swizzle(midgard_instruction *ins, unsigned old, uns
                         pan_compose_swizzle(mir_get_swizzle(ins, 0), swizzle));
         }
 
-        if (ins->ssa_args.src1 == old &&
-            !ins->ssa_args.inline_constant) {
+        if (ins->ssa_args.src1 == old) {
                 ins->ssa_args.src1 = new;
 
                 mir_set_swizzle(ins, 1,
@@ -335,7 +333,7 @@ mir_mask_of_read_components(midgard_instruction *ins, unsigned node)
         if (ins->ssa_args.src0 == node)
                 mask |= mir_mask_of_read_components_single(ins->alu.src1, ins->mask);
 
-        if (ins->ssa_args.src1 == node && !ins->ssa_args.inline_constant)
+        if (ins->ssa_args.src1 == node)
                 mask |= mir_mask_of_read_components_single(ins->alu.src2, ins->mask);
 
         return mask;